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soc/intel/alderlake: Update meminit code due to upd changes FSP 2147 onwards 

DisableDimmMc0Ch0 upds changed to DisableMc0Ch0 in new FSP releases. The definition
of the upd also changed. Changed FSP meminit code to work based on new definition of the UPDs.

Before:
0:Enable both DIMMs, 1:Disable DIMM0, 2:Disable DIMM1, 3:Disable both DIMMs

After:
0:Enable, 1:Disable

TEST=Boot to OS

Cq-Depend: chrome-internal:3831865, chrome-internal:3831864, chrome-internal:3831913
Cq-Depend: chromium:TODO

Signed-off-by: Bora Guvendik <bora.guvendik@intel.com>
Change-Id: I5af11ae99db3bbe3373a9bd4ce36453b58d62fec
Reviewed-on: https://review.coreboot.org/c/coreboot/+/54036
Reviewed-by: Maulik V Vaghela <maulik.v.vaghela@intel.com>
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Bora Guvendik 2021-05-10 14:59:25 -07:00 committed by David Hendricks
parent c4813ea260
commit 64b1352d05
1 changed files with 6 additions and 5 deletions
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11
src/soc/intel/alderlake/meminit.c
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@ -132,7 +132,7 @@ static void mem_init_spd_upds(FSP_M_CONFIG *mem_cfg, const struct mem_channel_da
[6] = { &mem_cfg->MemorySpdPtr12, &mem_cfg->MemorySpdPtr13, },
[7] = { &mem_cfg->MemorySpdPtr14, &mem_cfg->MemorySpdPtr15, },
};
uint8_t *disable_dimm_upds[MRC_CHANNELS] = {
uint8_t *disable_channel_upds[MRC_CHANNELS] = {
&mem_cfg->DisableMc0Ch0,
&mem_cfg->DisableMc0Ch1,
&mem_cfg->DisableMc0Ch2,
@ -147,16 +147,17 @@ static void mem_init_spd_upds(FSP_M_CONFIG *mem_cfg, const struct mem_channel_da
mem_cfg->MemorySpdDataLen = data->spd_len;
for (ch = 0; ch < MRC_CHANNELS; ch++) {
uint8_t *disable_dimm_ptr = disable_dimm_upds[ch];
*disable_dimm_ptr = 0;
uint8_t *disable_channel_ptr = disable_channel_upds[ch];
bool enable_channel = 0;
for (dimm = 0; dimm < CONFIG_DIMMS_PER_CHANNEL; dimm++) {
uint32_t *spd_ptr = spd_upds[ch][dimm];
*spd_ptr = data->spd[ch][dimm];
if (!*spd_ptr)
*disable_dimm_ptr |= BIT(dimm);
if (*spd_ptr)
enable_channel = 1;
}
*disable_channel_ptr = !enable_channel;
}
}