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crossgcc: rename source file names from gcc-5.2.0/* to binutils-2.25/* in binutils riscv patches 

Followup-To: I6f37748b4cf0852d292f8f5156fc27ab8fd481b6

Change-Id: Ib6599b2380b5f2efd92ae78b72b45f3d65681379
Signed-off-by: Jonathan A. Kollasch <jakllsch@kollasch.net>
Reviewed-on: http://review.coreboot.org/11329
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Reviewed-by: Idwer Vollering <vidwer@gmail.com>
This commit is contained in:
Jonathan A. Kollasch 2015-08-25 13:09:51 -05:00
parent 06e85acb40
commit 64fc433a56
1 changed files with 16 additions and 16 deletions
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32
util/crossgcc/patches/binutils-2.25_riscv.patch
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@ -1,5 +1,5 @@
diff -urN empty/bfd/cpu-riscv.c binutils-2.25/bfd/cpu-riscv.c
--- gcc-5.2.0/bfd/cpu-riscv.c 1970-01-01 01:00:00.000000000 +0100
--- binutils-2.25/bfd/cpu-riscv.c 1970-01-01 01:00:00.000000000 +0100
+++ binutils-2.25/bfd/cpu-riscv.c 2015-07-18 00:02:36.218287546 +0200
@@ -0,0 +1,80 @@
+/* BFD backend for RISC-V
@ -83,7 +83,7 @@ diff -urN empty/bfd/cpu-riscv.c binutils-2.25/bfd/cpu-riscv.c
+const bfd_arch_info_type bfd_riscv_arch =
+N (64, 64, 0, "riscv", TRUE, &arch_info_struct[0]);
diff -urN empty/bfd/elfnn-riscv.c binutils-2.25/bfd/elfnn-riscv.c
--- gcc-5.2.0/bfd/elfnn-riscv.c 1970-01-01 01:00:00.000000000 +0100
--- binutils-2.25/bfd/elfnn-riscv.c 1970-01-01 01:00:00.000000000 +0100
+++ binutils-2.25/bfd/elfnn-riscv.c 2015-07-18 00:02:36.218287546 +0200
@@ -0,0 +1,2995 @@
+/* RISC-V-specific support for NN-bit ELF.
@ -3082,7 +3082,7 @@ diff -urN empty/bfd/elfnn-riscv.c binutils-2.25/bfd/elfnn-riscv.c
+
+#include "elfNN-target.h"
diff -urN empty/bfd/elfxx-riscv.c binutils-2.25/bfd/elfxx-riscv.c
--- gcc-5.2.0/bfd/elfxx-riscv.c 1970-01-01 01:00:00.000000000 +0100
--- binutils-2.25/bfd/elfxx-riscv.c 1970-01-01 01:00:00.000000000 +0100
+++ binutils-2.25/bfd/elfxx-riscv.c 2015-07-18 00:02:36.218287546 +0200
@@ -0,0 +1,765 @@
+/* RISC-V-specific support for ELF.
@ -3851,7 +3851,7 @@ diff -urN empty/bfd/elfxx-riscv.c binutils-2.25/bfd/elfxx-riscv.c
+ return &howto_table[r_type];
+}
diff -urN empty/bfd/elfxx-riscv.h binutils-2.25/bfd/elfxx-riscv.h
--- gcc-5.2.0/bfd/elfxx-riscv.h 1970-01-01 01:00:00.000000000 +0100
--- binutils-2.25/bfd/elfxx-riscv.h 1970-01-01 01:00:00.000000000 +0100
+++ binutils-2.25/bfd/elfxx-riscv.h 2015-07-18 00:02:36.218287546 +0200
@@ -0,0 +1,34 @@
+/* RISC-V ELF specific backend routines.
@ -3889,7 +3889,7 @@ diff -urN empty/bfd/elfxx-riscv.h binutils-2.25/bfd/elfxx-riscv.h
+extern reloc_howto_type *
+riscv_elf_rtype_to_howto (unsigned int r_type);
diff -urN empty/gas/config/tc-riscv.c binutils-2.25/gas/config/tc-riscv.c
--- gcc-5.2.0/gas/config/tc-riscv.c 1970-01-01 01:00:00.000000000 +0100
--- binutils-2.25/gas/config/tc-riscv.c 1970-01-01 01:00:00.000000000 +0100
+++ binutils-2.25/gas/config/tc-riscv.c 2015-07-18 00:02:36.222287541 +0200
@@ -0,0 +1,2484 @@
+/* tc-riscv.c -- RISC-V assembler
@ -6377,7 +6377,7 @@ diff -urN empty/gas/config/tc-riscv.c binutils-2.25/gas/config/tc-riscv.c
+ pop_insert (riscv_pseudo_table);
+}
diff -urN empty/gas/config/tc-riscv.h binutils-2.25/gas/config/tc-riscv.h
--- gcc-5.2.0/gas/config/tc-riscv.h 1970-01-01 01:00:00.000000000 +0100
--- binutils-2.25/gas/config/tc-riscv.h 1970-01-01 01:00:00.000000000 +0100
+++ binutils-2.25/gas/config/tc-riscv.h 2015-07-18 00:02:36.222287541 +0200
@@ -0,0 +1,102 @@
+/* tc-riscv.h -- header file for tc-riscv.c.
@ -6483,7 +6483,7 @@ diff -urN empty/gas/config/tc-riscv.h binutils-2.25/gas/config/tc-riscv.h
+
+#endif /* TC_RISCV */
diff -urN empty/include/elf/riscv.h binutils-2.25/include/elf/riscv.h
--- gcc-5.2.0/include/elf/riscv.h 1970-01-01 01:00:00.000000000 +0100
--- binutils-2.25/include/elf/riscv.h 1970-01-01 01:00:00.000000000 +0100
+++ binutils-2.25/include/elf/riscv.h 2015-07-18 00:02:36.222287541 +0200
@@ -0,0 +1,143 @@
+/* RISC-V ELF support for BFD.
@ -6630,7 +6630,7 @@ diff -urN empty/include/elf/riscv.h binutils-2.25/include/elf/riscv.h
+
+#endif /* _ELF_RISCV_H */
diff -urN empty/include/opcode/riscv-opc.h binutils-2.25/include/opcode/riscv-opc.h
--- gcc-5.2.0/include/opcode/riscv-opc.h 1970-01-01 01:00:00.000000000 +0100
--- binutils-2.25/include/opcode/riscv-opc.h 1970-01-01 01:00:00.000000000 +0100
+++ binutils-2.25/include/opcode/riscv-opc.h 2015-07-18 00:02:36.222287541 +0200
@@ -0,0 +1,1348 @@
+/* Automatically generated by parse-opcodes */
@ -7982,7 +7982,7 @@ diff -urN empty/include/opcode/riscv-opc.h binutils-2.25/include/opcode/riscv-op
+DECLARE_CAUSE("mtimeh", CAUSE_MTIMEH)
+#endif
diff -urN empty/include/opcode/riscv.h binutils-2.25/include/opcode/riscv.h
--- gcc-5.2.0/include/opcode/riscv.h 1970-01-01 01:00:00.000000000 +0100
--- binutils-2.25/include/opcode/riscv.h 1970-01-01 01:00:00.000000000 +0100
+++ binutils-2.25/include/opcode/riscv.h 2015-07-18 00:02:36.222287541 +0200
@@ -0,0 +1,366 @@
+/* riscv.h. RISC-V opcode list for GDB, the GNU debugger.
@ -8352,7 +8352,7 @@ diff -urN empty/include/opcode/riscv.h binutils-2.25/include/opcode/riscv.h
+
+#endif /* _RISCV_H_ */
diff -urN empty/ld/emulparams/elf32lriscv-defs.sh binutils-2.25/ld/emulparams/elf32lriscv-defs.sh
--- gcc-5.2.0/ld/emulparams/elf32lriscv-defs.sh 1970-01-01 01:00:00.000000000 +0100
--- binutils-2.25/ld/emulparams/elf32lriscv-defs.sh 1970-01-01 01:00:00.000000000 +0100
+++ binutils-2.25/ld/emulparams/elf32lriscv-defs.sh 2015-07-18 00:02:36.222287541 +0200
@@ -0,0 +1,39 @@
+# This is an ELF platform.
@ -8395,24 +8395,24 @@ diff -urN empty/ld/emulparams/elf32lriscv-defs.sh binutils-2.25/ld/emulparams/el
+ unset GOT
+fi
diff -urN empty/ld/emulparams/elf32lriscv.sh binutils-2.25/ld/emulparams/elf32lriscv.sh
--- gcc-5.2.0/ld/emulparams/elf32lriscv.sh 1970-01-01 01:00:00.000000000 +0100
--- binutils-2.25/ld/emulparams/elf32lriscv.sh 1970-01-01 01:00:00.000000000 +0100
+++ binutils-2.25/ld/emulparams/elf32lriscv.sh 2015-07-18 00:02:36.222287541 +0200
@@ -0,0 +1,2 @@
+. ${srcdir}/emulparams/elf32lriscv-defs.sh
+OUTPUT_FORMAT="elf32-littleriscv"
diff -urN empty/ld/emulparams/elf64lriscv-defs.sh binutils-2.25/ld/emulparams/elf64lriscv-defs.sh
--- gcc-5.2.0/ld/emulparams/elf64lriscv-defs.sh 1970-01-01 01:00:00.000000000 +0100
--- binutils-2.25/ld/emulparams/elf64lriscv-defs.sh 1970-01-01 01:00:00.000000000 +0100
+++ binutils-2.25/ld/emulparams/elf64lriscv-defs.sh 2015-07-18 00:02:36.222287541 +0200
@@ -0,0 +1 @@
+. ${srcdir}/emulparams/elf32lriscv-defs.sh
diff -urN empty/ld/emulparams/elf64lriscv.sh binutils-2.25/ld/emulparams/elf64lriscv.sh
--- gcc-5.2.0/ld/emulparams/elf64lriscv.sh 1970-01-01 01:00:00.000000000 +0100
--- binutils-2.25/ld/emulparams/elf64lriscv.sh 1970-01-01 01:00:00.000000000 +0100
+++ binutils-2.25/ld/emulparams/elf64lriscv.sh 2015-07-18 00:02:36.222287541 +0200
@@ -0,0 +1,2 @@
+. ${srcdir}/emulparams/elf64lriscv-defs.sh
+OUTPUT_FORMAT="elf64-littleriscv"
diff -urN empty/ld/emultempl/riscvelf.em binutils-2.25/ld/emultempl/riscvelf.em
--- gcc-5.2.0/ld/emultempl/riscvelf.em 1970-01-01 01:00:00.000000000 +0100
--- binutils-2.25/ld/emultempl/riscvelf.em 1970-01-01 01:00:00.000000000 +0100
+++ binutils-2.25/ld/emultempl/riscvelf.em 2015-07-18 00:02:36.222287541 +0200
@@ -0,0 +1,68 @@
+# This shell script emits a C file. -*- C -*-
@ -8484,7 +8484,7 @@ diff -urN empty/ld/emultempl/riscvelf.em binutils-2.25/ld/emultempl/riscvelf.em
+LDEMUL_BEFORE_ALLOCATION=riscv_elf_before_allocation
+LDEMUL_AFTER_ALLOCATION=gld${EMULATION_NAME}_after_allocation
diff -urN empty/opcodes/riscv-dis.c binutils-2.25/opcodes/riscv-dis.c
--- gcc-5.2.0/opcodes/riscv-dis.c 1970-01-01 01:00:00.000000000 +0100
--- binutils-2.25/opcodes/riscv-dis.c 1970-01-01 01:00:00.000000000 +0100
+++ binutils-2.25/opcodes/riscv-dis.c 2015-07-18 00:02:36.222287541 +0200
@@ -0,0 +1,590 @@
+/* RISC-V disassembler
@ -9078,7 +9078,7 @@ diff -urN empty/opcodes/riscv-dis.c binutils-2.25/opcodes/riscv-dis.c
+ fprintf (stream, _("\n"));
+}
diff -urN empty/opcodes/riscv-opc.c binutils-2.25/opcodes/riscv-opc.c
--- gcc-5.2.0/opcodes/riscv-opc.c 1970-01-01 01:00:00.000000000 +0100
--- binutils-2.25/opcodes/riscv-opc.c 1970-01-01 01:00:00.000000000 +0100
+++ binutils-2.25/opcodes/riscv-opc.c 2015-07-18 00:02:36.222287541 +0200
@@ -0,0 +1,867 @@
+/* RISC-V opcode list