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Fix mptable build troubles 

A missing mptable.c file got passed jenkins, got merged
and broke the build. Hopefully finally fix this.

Deletes unused files:
   src/mainboard/asus/dsbf/mptable.c
   src/mainboard/supermicro/x7db8/mptable.c

Change-Id: Ie81f5a6c4c69ab381f86a243bc8874395e69ee26
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: http://review.coreboot.org/1486
Tested-by: build bot (Jenkins)
Reviewed-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
This commit is contained in:
Kyösti Mälkki 2012-08-25 00:21:44 +03:00 committed by Alexandru Gagniuc
parent 1c36eada27
commit 651339bb5d
7 changed files with 4 additions and 95 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

4
src/Kconfig
View File

@ -383,7 +383,7 @@ config GENERATE_ACPI_TABLES
config GENERATE_MP_TABLE config GENERATE_MP_TABLE
bool bool
default HAVE_MP_TABLE default HAVE_MP_TABLE || DRIVERS_GENERIC_IOAPIC
config GENERATE_PIRQ_TABLE config GENERATE_PIRQ_TABLE
bool bool
@ -413,7 +413,7 @@ config GENERATE_ACPI_TABLES
If unsure, say Y. If unsure, say Y.
config GENERATE_MP_TABLE config GENERATE_MP_TABLE
depends on HAVE_MP_TABLE depends on HAVE_MP_TABLE || DRIVERS_GENERIC_IOAPIC
bool "Generate an MP table" bool "Generate an MP table"
default y default y
help help

2
src/arch/x86/Makefile.inc
View File

@ -237,8 +237,10 @@ endif
romstage-srcs += $(objgenerated)/crt0.s romstage-srcs += $(objgenerated)/crt0.s
ramstage-srcs += src/mainboard/$(MAINBOARDDIR)/mainboard.c ramstage-srcs += src/mainboard/$(MAINBOARDDIR)/mainboard.c
ifeq ($(CONFIG_GENERATE_MP_TABLE),y) ifeq ($(CONFIG_GENERATE_MP_TABLE),y)
ifeq ($(CONFIG_HAVE_MP_TABLE),y)
ramstage-srcs += src/mainboard/$(MAINBOARDDIR)/mptable.c ramstage-srcs += src/mainboard/$(MAINBOARDDIR)/mptable.c
endif endif
endif
ifeq ($(CONFIG_GENERATE_PIRQ_TABLE),y) ifeq ($(CONFIG_GENERATE_PIRQ_TABLE),y)
ramstage-srcs += src/mainboard/$(MAINBOARDDIR)/irq_tables.c ramstage-srcs += src/mainboard/$(MAINBOARDDIR)/irq_tables.c
endif endif

1
src/mainboard/asus/dsbf/Kconfig
View File

@ -9,7 +9,6 @@ config BOARD_SPECIFIC_OPTIONS # dummy
select SUPERIO_WINBOND_W83627HF select SUPERIO_WINBOND_W83627HF
select MMCONF_SUPPORT select MMCONF_SUPPORT
select BOARD_ROMSIZE_KB_512 select BOARD_ROMSIZE_KB_512
select HAVE_MP_TABLE
select HAVE_PIRQ_TABLE select HAVE_PIRQ_TABLE
select DRIVERS_I2C_W83793 select DRIVERS_I2C_W83793
select DRIVERS_GENERIC_IOAPIC select DRIVERS_GENERIC_IOAPIC

0
src/mainboard/asus/dsbf/mptable.c
View File

1
src/mainboard/samsung/lumpy/Kconfig
View File

@ -12,7 +12,6 @@ config BOARD_SPECIFIC_OPTIONS # dummy
select GFXUMA select GFXUMA
select HAVE_ACPI_RESUME select HAVE_ACPI_RESUME
select HAVE_ACPI_TABLES select HAVE_ACPI_TABLES
select HAVE_MP_TABLE
select HAVE_OPTION_TABLE select HAVE_OPTION_TABLE
select HAVE_SMI_HANDLER select HAVE_SMI_HANDLER
select MMCONF_SUPPORT select MMCONF_SUPPORT

1
src/mainboard/supermicro/x7db8/Kconfig
View File

@ -9,7 +9,6 @@ config BOARD_SPECIFIC_OPTIONS # dummy
select SUPERIO_WINBOND_W83627HF select SUPERIO_WINBOND_W83627HF
select MMCONF_SUPPORT select MMCONF_SUPPORT
select BOARD_ROMSIZE_KB_512 select BOARD_ROMSIZE_KB_512
select HAVE_MP_TABLE
select HAVE_PIRQ_TABLE select HAVE_PIRQ_TABLE
select DRIVERS_I2C_W83793 select DRIVERS_I2C_W83793
select DRIVERS_GENERIC_IOAPIC select DRIVERS_GENERIC_IOAPIC

90
src/mainboard/supermicro/x7db8/mptable.c
View File

@ -1,90 +0,0 @@
/*
* This file is part of the coreboot project.
*
* Copyright (c) 2011 Sven Schnelle <svens@stackframe.org>
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; version 2 of
* the License.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston,
* MA 02110-1301 USA
*/
#include <device/device.h>
#include <device/pci.h>
#include <console/console.h>
#include <arch/smp/mpspec.h>
#include <arch/ioapic.h>
#include <string.h>
#include <stdint.h>
static void *smp_write_config_table(void *v)
{
struct mp_config_table *mc;
int isa_bus;
mc = (void *)(((char *)v) + SMP_FLOATING_TABLE_LEN);
mptable_init(mc, LOCAL_APIC_ADDR);
smp_write_processors(mc);
mptable_write_buses(mc, NULL, &isa_bus);
/* I/O APICs: APIC ID Version State Address */
smp_write_ioapic(mc, 8, 0x20, IO_APIC_ADDR);
smp_write_ioapic(mc, 9, 0x20, IO_APIC_ADDR + 0x80000);
/* Legacy Interrupts */
mptable_add_isa_interrupts(mc, isa_bus, 0x8, 0);
smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, 0x00, (0x00 << 2), 0x08, 0x10);
smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, 0x00, (0x02 << 2), 0x08, 0x10);
smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, 0x00, (0x03 << 2), 0x08, 0x10);
smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, 0x00, (0x04 << 2), 0x08, 0x10);
smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, 0x02, (0x02 << 2), 0x08, 0x10);
smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, 0x00, (0x1b << 2), 0x08, 0x11); /* HD Audio 0:1b.0 */
smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, 0x00, (0x1c << 2), 0x08, 0x14); /* PCIe 0:1c.0 */
smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, 0x00, (0x1c << 2) | 0x01, 0x08, 0x15); /* PCIe 0:1c.1 */
smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, 0x00, (0x1c << 2) | 0x02, 0x08, 0x16); /* PCIe 0:1c.2 */
smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, 0x00, (0x1c << 2) | 0x03, 0x08, 0x17); /* PCIe 0:1c.3 */
smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, 0x00, (0x1d << 2) , 0x08, 0x10); /* USB 0:1d.0 */
smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, 0x00, (0x1d << 2) | 0x01, 0x08, 0x11); /* USB 0:1d.1 */
smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, 0x00, (0x1d << 2) | 0x02, 0x08, 0x12); /* USB 0:1d.2 */
smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, 0x00, (0x1d << 2) | 0x03, 0x08, 0x13); /* USB 0:1d.3 */
smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, 0x00, (0x1f << 2), 0x08, 0x11); /* SATA 0:1f.2 */
/* e1000 */
smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, 0x07, (0x00 << 2) | 0x00, 0x08, 0x12);
smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, 0x07, (0x00 << 2) | 0x01, 0x08, 0x13);
/* SCSI on board */
smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, 0x04, (0x02 << 2) | 0x00, 0x08, 0x10);
smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, 0x04, (0x02 << 2) | 0x01, 0x08, 0x11);
/* SCSI add on */
smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, 0x08, (0x01 << 2) | 0x00, 0x09, 0x00);
smp_write_intsrc(mc, mp_ExtINT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_HIGH, isa_bus, 0x00, MP_APIC_ALL, 0x00);
smp_write_intsrc(mc, mp_NMI, MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT, isa_bus, 0x00, MP_APIC_ALL, 0x01);
return mptable_finalize(mc);
}
unsigned long write_smp_table(unsigned long addr)
{
void *v;
v = smp_write_floating_table(addr, 0);
return (unsigned long)smp_write_config_table(v);
}