diff --git a/src/mainboard/google/brya/variants/kano/overridetree.cb b/src/mainboard/google/brya/variants/kano/overridetree.cb
index 5fbeb3c31d..39cca42b4f 100644
--- a/src/mainboard/google/brya/variants/kano/overridetree.cb
+++ b/src/mainboard/google/brya/variants/kano/overridetree.cb
@@ -63,6 +63,18 @@ chip soc/intel/alderlake
 		},
 	}"
 
+	register "power_limits_config[ADL_P_282_482_28W_CORE]" = "{
+		.tdp_pl1_override = 20,
+		.tdp_pl2_override = 43,
+		.tdp_pl4 = 105,
+	}"
+
+	register "power_limits_config[ADL_P_682_28W_CORE]" = "{
+		.tdp_pl1_override = 20,
+		.tdp_pl2_override = 43,
+		.tdp_pl4 = 105,
+	}"
+
 	device domain 0 on
 		device ref dtt on
 			chip drivers/intel/dptf
@@ -119,14 +131,14 @@ chip soc/intel/alderlake
 				register "controls.power_limits" = "{
 					.pl1 = {
 							.min_power = 18000,
-							.max_power = 28000,
+							.max_power = 20000,
 							.time_window_min = 28 * MSECS_PER_SEC,
 							.time_window_max = 32 * MSECS_PER_SEC,
 							.granularity = 200,
 						},
 					.pl2 = {
-							.min_power = 40000,
-							.max_power = 40000,
+							.min_power = 43000,
+							.max_power = 43000,
 							.time_window_min = 28 * MSECS_PER_SEC,
 							.time_window_max = 32 * MSECS_PER_SEC,
 							.granularity = 1000,
diff --git a/src/mainboard/google/brya/variants/kano/ramstage.c b/src/mainboard/google/brya/variants/kano/ramstage.c
index 9bba1df9e9..aa48a9db31 100644
--- a/src/mainboard/google/brya/variants/kano/ramstage.c
+++ b/src/mainboard/google/brya/variants/kano/ramstage.c
@@ -7,8 +7,8 @@ const struct cpu_power_limits limits[] = {
 	/* SKU_ID, TDP (Watts), pl1_min, pl1_max, pl2_min, pl2_max, pl4 */
 	{ PCI_DID_INTEL_ADL_P_ID_7, 15, 12000, 15000, 40000, 40000, 105000 },
 	{ PCI_DID_INTEL_ADL_P_ID_6, 15, 12000, 15000, 40000, 40000, 105000 },
-	{ PCI_DID_INTEL_ADL_P_ID_5, 28, 18000, 28000, 40000, 40000, 105000 },
-	{ PCI_DID_INTEL_ADL_P_ID_3, 28, 18000, 28000, 40000, 40000, 105000 },
+	{ PCI_DID_INTEL_ADL_P_ID_5, 28, 18000, 20000, 43000, 43000, 105000 },
+	{ PCI_DID_INTEL_ADL_P_ID_3, 28, 18000, 20000, 43000, 43000, 105000 },
 };
 
 void variant_devtree_update(void)