soc/intel/tigerlake: Match RP number with TGL EDS
Update RP number to 12 according to PCH EDS#576591 vol1 rev1.2. BUG=b:151208838 TEST=build RVP successfully Signed-off-by: Wonkyu Kim <wonkyu.kim@intel.com> Change-Id: Iabdbfd99f7154741c16da53bcd9d1c7ca4f81129 Reviewed-on: https://review.coreboot.org/c/coreboot/+/39490 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Caveh Jalali <caveh@chromium.org> Reviewed-by: Srinidhi N Kaushik <srinidhi.n.kaushik@intel.com>
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@ -312,71 +312,3 @@ Device (RP12)
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Return (IRQM (RPPN))
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Return (IRQM (RPPN))
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}
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}
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}
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}
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Device (RP13)
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{
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Name (_ADR, 0x001D0004)
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OperationRegion (RPCS, PCI_Config, 0x4c, 4)
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Field (RPCS, AnyAcc, NoLock, Preserve)
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{
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, 24,
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RPPN, 8, /* Root Port Number */
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}
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Method (_PRT)
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{
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Return (IRQM (RPPN))
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}
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}
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Device (RP14)
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{
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Name (_ADR, 0x001D0005)
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OperationRegion (RPCS, PCI_Config, 0x4c, 4)
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Field (RPCS, AnyAcc, NoLock, Preserve)
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{
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, 24,
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RPPN, 8, /* Root Port Number */
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}
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Method (_PRT)
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{
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Return (IRQM (RPPN))
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}
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}
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Device (RP15)
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{
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Name (_ADR, 0x001D0006)
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OperationRegion (RPCS, PCI_Config, 0x4c, 4)
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Field (RPCS, AnyAcc, NoLock, Preserve)
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{
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, 24,
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RPPN, 8, /* Root Port Number */
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}
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Method (_PRT)
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{
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Return (IRQM (RPPN))
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}
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}
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Device (RP16)
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{
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Name (_ADR, 0x001D0007)
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OperationRegion (RPCS, PCI_Config, 0x4c, 4)
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Field (RPCS, AnyAcc, NoLock, Preserve)
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{
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, 24,
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RPPN, 8, /* Root Port Number */
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}
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Method (_PRT)
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{
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Return (IRQM (RPPN))
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}
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}
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