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soc/intel/apollolake: Use SCS common code 

This patch uses common SCS library to setup
sd card.

Change-Id: Iafbba04d7a498b9a321e8efee4abf07820d17330
Signed-off-by: Bora Guvendik <bora.guvendik@intel.com>
Reviewed-on: https://review.coreboot.org/19632
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Philippe Mathieu-Daudé <philippe.mathieu.daude@gmail.com>
This commit is contained in:
Bora Guvendik 2017-05-08 16:29:17 -07:00 committed by Aaron Durbin
parent 94ee328b97
commit 65623b7264
2 changed files with 14 additions and 65 deletions
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2
src/soc/intel/apollolake/Kconfig
View File

@ -61,9 +61,9 @@ config CPU_SPECIFIC_OPTIONS
select SOC_INTEL_COMMON_BLOCK_I2C select SOC_INTEL_COMMON_BLOCK_I2C
select SOC_INTEL_COMMON_BLOCK_LPSS select SOC_INTEL_COMMON_BLOCK_LPSS
select SOC_INTEL_COMMON_BLOCK_PCR select SOC_INTEL_COMMON_BLOCK_PCR
select SOC_INTEL_COMMON_BLOCK_SA
select SOC_INTEL_COMMON_BLOCK_RTC select SOC_INTEL_COMMON_BLOCK_RTC
select SOC_INTEL_COMMON_BLOCK_SA select SOC_INTEL_COMMON_BLOCK_SA
select SOC_INTEL_COMMON_BLOCK_SCS
select SOC_INTEL_COMMON_BLOCK_TIMER select SOC_INTEL_COMMON_BLOCK_TIMER
select SOC_INTEL_COMMON_BLOCK_UART select SOC_INTEL_COMMON_BLOCK_UART
select SOC_INTEL_COMMON_BLOCK_XDCI select SOC_INTEL_COMMON_BLOCK_XDCI

77
src/soc/intel/apollolake/sd.c
View File

@ -13,76 +13,25 @@
* GNU General Public License for more details. * GNU General Public License for more details.
*/ */
#include <arch/acpi_device.h> #include <intelblocks/sd.h>
#include <arch/acpigen.h>
#include <device/device.h>
#include <device/pci.h>
#include <device/pci_ids.h>
#include <gpio.h>
#include "chip.h" #include "chip.h"
#if IS_ENABLED(CONFIG_HAVE_ACPI_TABLES) int sd_fill_soc_gpio_info(struct acpi_gpio* gpio, struct device *dev)
static void sd_fill_ssdt(struct device *dev)
{ {
config_t *config = dev->chip_info; config_t *config = dev->chip_info;
const char *path;
struct acpi_gpio default_gpio = {
.type = ACPI_GPIO_TYPE_INTERRUPT,
.pull = ACPI_GPIO_PULL_NONE,
.irq.mode = ACPI_IRQ_EDGE_TRIGGERED,
.irq.polarity = ACPI_IRQ_ACTIVE_BOTH,
.irq.shared = ACPI_IRQ_SHARED,
.irq.wake = ACPI_IRQ_WAKE,
.interrupt_debounce_timeout = 10000, /* 100ms */
.pin_count = 1,
.pins = { config->sdcard_cd_gpio }
};
struct acpi_dp *dp;
if (!dev->enabled)
return;
/* Use device path as the Scope for the SSDT */
path = acpi_device_path(dev);
if (!path)
return;
if (!config->sdcard_cd_gpio) if (!config->sdcard_cd_gpio)
return; return -1;
acpigen_write_scope(path);
acpigen_write_name("_CRS");
/* Write GpioInt() as default (if set) or custom from devicetree */ gpio->type = ACPI_GPIO_TYPE_INTERRUPT;
acpigen_write_resourcetemplate_header(); gpio->pull = ACPI_GPIO_PULL_NONE;
acpi_device_write_gpio(&default_gpio); gpio->irq.mode = ACPI_IRQ_EDGE_TRIGGERED;
acpigen_write_resourcetemplate_footer(); gpio->irq.polarity = ACPI_IRQ_ACTIVE_BOTH;
gpio->irq.shared = ACPI_IRQ_SHARED;
gpio->irq.wake = ACPI_IRQ_WAKE;
gpio->interrupt_debounce_timeout = 10000; /* 100ms */
gpio->pin_count = 1;
gpio->pins[0] = config->sdcard_cd_gpio;
/* Bind the cd-gpio name to the GpioInt() resource */ return 0;
dp = acpi_dp_new_table("_DSD");
acpi_dp_add_gpio(dp, "cd-gpio", path, 0, 0, 1);
acpi_dp_write(dp);
acpigen_pop_len();
} }
#endif
static struct device_operations dev_ops = {
.read_resources = &pci_dev_read_resources,
.set_resources = &pci_dev_set_resources,
.enable_resources = &pci_dev_enable_resources,
.ops_pci = &soc_pci_ops,
#if IS_ENABLED(CONFIG_HAVE_ACPI_TABLES)
.acpi_fill_ssdt_generator = &sd_fill_ssdt,
#endif
};
static const unsigned short pci_device_ids[] = {
PCI_DEVICE_ID_INTEL_APL_SD,
PCI_DEVICE_ID_INTEL_GLK_SD,
0,
};
static const struct pci_driver pch_sd __pci_driver = {
.ops = &dev_ops,
.vendor = PCI_VENDOR_ID_INTEL,
.devices= pci_device_ids,
};