mb/intel/mtlrvp: Enable Audio for MTL-P RVP

This patch adds FW_CONFIG and codec support for MTL-P RVP

BUG=None
TEST=Build and boot MTL-P RVP to Chrome OS. Verify audio codec listed
under aplay -l and audio working with the connected audio card.

localhost ~ # aplay -l
**** List of PLAYBACK Hardware Devices ****
card 0: sofrt5682 [sof-rt5682], device 0: Headset (*) []
  Subdevices: 1/1
  Subdevice #0: subdevice #0
card 0: sofrt5682 [sof-rt5682], device 1: Speakers (*) []
  Subdevices: 1/1
  Subdevice #0: subdevice #0
card 0: sofrt5682 [sof-rt5682], device 5: HDMI1 (*) []
  Subdevices: 1/1
  Subdevice #0: subdevice #0
card 0: sofrt5682 [sof-rt5682], device 6: HDMI2 (*) []
  Subdevices: 1/1
  Subdevice #0: subdevice #0
card 0: sofrt5682 [sof-rt5682], device 7: HDMI3 (*) []
  Subdevices: 1/1
  Subdevice #0: subdevice #0
card 0: sofrt5682 [sof-rt5682], device 8: HDMI4 (*) []
  Subdevices: 1/1
  Subdevice #0: subdevice #0

Signed-off-by: Usha P <usha.p@intel.com>
Change-Id: Ib29ac3e4105e578e1555076d180b35a8265a99c8
Signed-off-by: Jamie Ryu <jamie.m.ryu@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/73015
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Sridhar Siricilla <sridhar.siricilla@intel.com>
Reviewed-by: Eric Lai <eric_lai@quanta.corp-partner.google.com>

src/mainboard/intel/mtlrvp/Kconfig

@@ -1,6 +1,14 @@
 config BOARD_INTEL_MTLRVP_COMMON
 	def_bool n
 	select BOARD_ROMSIZE_KB_32768
+	select DRIVERS_I2C_GENERIC
+	select DRIVERS_I2C_HID
+	select DRIVERS_I2C_MAX98373
+	select DRIVERS_INTEL_SOUNDWIRE
+	select DRIVERS_GENERIC_MAX98357A
+	select DRIVERS_SOUNDWIRE_ALC711
+	select DRIVERS_SOUNDWIRE_ALC5682
+	select DRIVERS_SOUNDWIRE_MAX98373
 	select DRIVERS_USB_ACPI
 	select HAVE_ACPI_RESUME
 	select HAVE_ACPI_TABLES
@@ -17,6 +25,8 @@ config BOARD_INTEL_MTLRVP_P
 config BOARD_INTEL_MTLRVP_P_EXT_EC
 	select BOARD_INTEL_MTLRVP_COMMON
 	select DRIVERS_INTEL_PMC
+	select FW_CONFIG
+	select FW_CONFIG_SOURCE_CHROMEEC_CBI
 
 if BOARD_INTEL_MTLRVP_COMMON
 

src/mainboard/intel/mtlrvp/fw_config.c

@@ -0,0 +1,101 @@
+#include <bootstate.h>
+#include <console/console.h>
+#include <fw_config.h>
+#include <gpio.h>
+#include <inttypes.h>
+
+static const struct pad_config i2s_enable_pads[] = {
+	/* Audio: I2S */
+	PAD_CFG_NF(GPP_D09, NONE, DEEP, NF2), /* I2S_MCLK1_OUT */
+	PAD_CFG_NF(GPP_D10, NONE, DEEP, NF2), /* I2S0_SCLK_HDR */
+	PAD_CFG_NF(GPP_D11, NONE, DEEP, NF2), /* I2S0_SFRM_HDR */
+	PAD_CFG_NF(GPP_D12, NONE, DEEP, NF2), /* I2S0_TXD_HDR */
+	PAD_CFG_NF(GPP_D13, NONE, DEEP, NF2), /* I2S0_RXD_HDR */
+
+	PAD_CFG_NF(GPP_S00, NONE, DEEP, NF6), /* I2S1_SCLK_HDR */
+	PAD_CFG_NF(GPP_S01, NONE, DEEP, NF6), /* I2S1_SFRM_HDR */
+	PAD_CFG_NF(GPP_S02, NONE, DEEP, NF6), /* I2S1_TXD_HDR */
+	PAD_CFG_NF(GPP_S03, NONE, DEEP, NF6), /* I2S1_RXD_HDR */
+	PAD_CFG_NF(GPP_S06, NONE, DEEP, NF3), /* DMIC_CLK_A1 */
+	PAD_CFG_NF(GPP_S07, NONE, DEEP, NF3), /* DMIC_DATA1 */
+};
+
+static const struct pad_config sndw_enable_pads[] = {
+	/* Soundwire GPIO Config */
+	/* DMIC config pads */
+	PAD_CFG_NF(GPP_D09, NONE, DEEP, NF2),
+	PAD_CFG_NF(GPP_D10, NONE, DEEP, NF2),
+	PAD_CFG_NF(GPP_D11, NONE, DEEP, NF2),
+	PAD_CFG_NF(GPP_D12, NONE, DEEP, NF2),
+	PAD_CFG_NF(GPP_D13, NONE, DEEP, NF2),
+	/* Soundwire - External codec - JE Header */
+	PAD_CFG_NF(GPP_S00, NONE, DEEP, NF1),
+	PAD_CFG_NF(GPP_S01, NONE, DEEP, NF1),
+	PAD_CFG_NF(GPP_S04, NONE, DEEP, NF1),
+	PAD_CFG_NF(GPP_S05, NONE, DEEP, NF1),
+	/* DMIC - JD Header */
+	PAD_CFG_NF(GPP_S02, NONE, DEEP, NF3),
+	PAD_CFG_NF(GPP_S03, NONE, DEEP, NF3),
+	PAD_CFG_NF(GPP_S06, NONE, DEEP, NF3),
+	PAD_CFG_NF(GPP_S07, NONE, DEEP, NF3),
+};
+
+static const struct pad_config sndw_alc711_enable_pads[] = {
+	/* DMIC config pads */
+	PAD_CFG_NF(GPP_D09, NONE, DEEP, NF2),
+	PAD_CFG_NF(GPP_D10, NONE, DEEP, NF2),
+	PAD_CFG_NF(GPP_D11, NONE, DEEP, NF2),
+	PAD_CFG_NF(GPP_D12, NONE, DEEP, NF2),
+	PAD_CFG_NF(GPP_D13, NONE, DEEP, NF2),
+	/* Soundwire GPIO Config */
+	PAD_CFG_NF(GPP_S00, NONE, DEEP, NF1),
+	PAD_CFG_NF(GPP_S01, NONE, DEEP, NF1),
+	/* DMIC - JD Header */
+	PAD_CFG_NF(GPP_S02, NONE, DEEP, NF3),
+	PAD_CFG_NF(GPP_S03, NONE, DEEP, NF3),
+	PAD_CFG_NF(GPP_S06, NONE, DEEP, NF3),
+	PAD_CFG_NF(GPP_S07, NONE, DEEP, NF3),
+};
+
+static const struct pad_config audio_disable_pads[] = {
+	PAD_NC(GPP_S00, NONE),
+	PAD_NC(GPP_S01, NONE),
+	PAD_NC(GPP_S02, NONE),
+	PAD_NC(GPP_S03, NONE),
+	PAD_NC(GPP_S04, NONE),
+	PAD_NC(GPP_S05, NONE),
+	PAD_NC(GPP_S06, NONE),
+	PAD_NC(GPP_S07, NONE),
+	PAD_NC(GPP_D09, NONE),
+	PAD_NC(GPP_D10, NONE),
+	PAD_NC(GPP_D11, NONE),
+	PAD_NC(GPP_D12, NONE),
+	PAD_NC(GPP_D13, NONE),
+};
+
+static void fw_config_handle(void *unused)
+{
+	printk(BIOS_INFO, "FW config 0x%" PRIx64 "\n", fw_config_get());
+	if (fw_config_probe(FW_CONFIG(AUDIO, NONE))) {
+		printk(BIOS_INFO, "Configure GPIOs for no audio.\n");
+		gpio_configure_pads(audio_disable_pads, ARRAY_SIZE(audio_disable_pads));
+	}
+
+	if (fw_config_probe(FW_CONFIG(AUDIO, MTL_ALC1019_ALC5682I_I2S)) ||
+		fw_config_probe(FW_CONFIG(AUDIO, MTL_ALC5682I_MAX9857A_I2S))) {
+		printk(BIOS_INFO, "Configure GPIOs for I2S audio.\n");
+		gpio_configure_pads(i2s_enable_pads, ARRAY_SIZE(i2s_enable_pads));
+	}
+
+	if (fw_config_probe(FW_CONFIG(AUDIO, MTL_MAX98373_ALC5682_SNDW))) {
+		printk(BIOS_INFO, "Configure GPIOs for SoundWire audio (ext codec).\n");
+		gpio_configure_pads(sndw_enable_pads, ARRAY_SIZE(i2s_enable_pads));
+	}
+
+	if (fw_config_probe(FW_CONFIG(AUDIO, MTL_ALC711_SNDW))) {
+		printk(BIOS_INFO, "Configure GPIOs for SoundWire audio (onboard codec).\n");
+		gpio_configure_pads(sndw_alc711_enable_pads, ARRAY_SIZE(i2s_enable_pads));
+	}
+
+}
+BOOT_STATE_INIT_ENTRY(BS_DEV_ENABLE, BS_ON_ENTRY, fw_config_handle, NULL);

src/mainboard/intel/mtlrvp/variants/baseboard/mtlrvp_p/devicetree.cb

@@ -1,3 +1,13 @@
+fw_config
+	field AUDIO 8 10
+		option NONE 				0
+		option MTL_ALC1019_ALC5682I_I2S		1
+		option MTL_MAX98373_ALC5682_SNDW	2
+		option MTL_ALC711_SNDW			3
+		option MTL_ALC5682I_MAX9857A_I2S	4
+	end
+end
+
 chip soc/intel/meteorlake
 
 	# GPE configuration
@@ -87,6 +97,12 @@ chip soc/intel/meteorlake
 		[PchSerialIoIndexGSPI1] = 0,
 	}"
 
+	# HD Audio
+	register "pch_hda_dsp_enable" = "1"
+	register "pch_hda_idisp_link_tmode" = "HDA_TMODE_8T"
+	register "pch_hda_idisp_link_frequency" = "HDA_LINKFREQ_96MHZ"
+	register "pch_hda_idisp_codec_enable" = "1"
+
 	# DPTF enable
 	register "dptf_enable" = "1"
 
@@ -374,12 +390,113 @@ chip soc/intel/meteorlake
 		device ref i2c0 on end
 		device ref i2c1 on end
 		device ref i2c2 on end
-		device ref i2c3 on end
+		device ref i2c3 on
+			chip drivers/i2c/generic
+				register "hid" = ""10EC5682""
+				register "name" = ""RT58""
+				register "desc" = ""Headset Codec""
+				register "irq_gpio" = "ACPI_GPIO_IRQ_EDGE_BOTH(GPP_S05)"
+				register "probed" = "1"
+				# jd_src RT5668_JD1 = 1, RT5682_JD_NULL = 0
+				register "property_count" = "1"
+				register "property_list[0].type" = "ACPI_DP_TYPE_INTEGER"
+				register "property_list[0].name" = ""realtek,jd-src""
+				register "property_list[0].integer" = "1"
+				device i2c 1a on
+					probe AUDIO MTL_ALC1019_ALC5682I_I2S
+					probe AUDIO MTL_ALC5682I_MAX9857A_I2S
+				end
+			end
+			# Ref config #5 for Chrome, transducer card config 5A
+			#+-------------------+-------------------+
+			#| Speaker Amp       | Assignment        |
+			#+-------------------+-------------------+
+			#| SPK 0             | left              |
+			#| SPK 1             | right             |
+			#| SPK 2             | top left          |
+			#| SPK 3             | top right         |
+			#+-------------------+-------------------+
+			chip drivers/i2c/generic
+				register "hid" = ""10EC1019""
+				register "desc" = ""Realtek SPK AMP L""
+				register "uid" = "0"
+				device i2c 28 on
+					probe AUDIO MTL_ALC1019_ALC5682I_I2S
+				end
+			end
+			chip drivers/i2c/generic
+				register "hid" = ""10EC1019""
+				register "desc" = ""Realtek SPK AMP R""
+				register "uid" = "1"
+				device i2c 29 on
+					probe AUDIO MTL_ALC1019_ALC5682I_I2S
+				end
+			end
+			chip drivers/i2c/generic
+				register "hid" = ""10EC1019""
+				register "desc" = ""Realtek SPK AMP TL""
+				register "uid" = "2"
+				device i2c 2a on
+					probe AUDIO MTL_ALC1019_ALC5682I_I2S
+				end
+			end
+			chip drivers/i2c/generic
+				register "hid" = ""10EC1019""
+				register "desc" = ""Realtek SPK AMP TR""
+				register "uid" = "3"
+				device i2c 2b on
+					probe AUDIO MTL_ALC1019_ALC5682I_I2S
+				end
+			end
+		end # I2C3
 		device ref i2c4 on end
 		device ref i2c5 on end
 		device ref shared_sram on end
 		device ref uart0 on end
 		device ref gspi1 on end
 		device ref smbus on end
+		device ref hda on
+			chip drivers/intel/soundwire
+				device generic 0 on
+					chip drivers/soundwire/alc711
+						# SoundWire Link 0 ID 1
+						register "desc" = ""Headset Codec""
+						device generic 0.1 on
+							probe AUDIO MTL_ALC711_SNDW
+						end
+					end
+					chip drivers/soundwire/alc5682
+						# SoundWire Link 2 ID 1
+						register "desc" = ""Headset Codec""
+						device generic 2.1 on
+							probe AUDIO MTL_MAX98373_ALC5682_SNDW
+						end
+					end
+					chip drivers/soundwire/max98373
+						# SoundWire Link 0 ID 3
+						register "desc" = ""Left Speaker Amp""
+						device generic 0.3 on
+							probe AUDIO MTL_MAX98373_ALC5682_SNDW
+						end
+					end
+					chip drivers/soundwire/max98373
+						# SoundWire Link 0 ID 7
+						register "desc" = ""Right Speaker Amp""
+						device generic 0.7 on
+							probe AUDIO MTL_MAX98373_ALC5682_SNDW
+						end
+					end
+					chip drivers/generic/max98357a
+						register "hid" = ""MX98357A""
+						register "sdmode_gpio" =
+								"ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_S04)"
+						register "sdmode_delay" = "5"
+						device generic 0 on
+							probe AUDIO MTL_ALC5682I_MAX9857A_I2S
+						end
+					end
+				end
+			end
+		end
 	end
 end