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smscsuperio: map interrupt in smscsuperio_enable_serial() 

This is a stopgap for when you use SUPERIO_SMSC_SMSCSUPERIO and the
interrupt is unmapped at reset, but for whatever reason the chip is
inaccessible in smscsuperio/superio.c::enable_dev() and thus the
devicetree.cb IRQ information is not applied in ramstage and then
serial console output fails to work for more than the UART FIFO depth
in the OS.

Change-Id: I00998088975569516f7caeb7f4098b48fe437889
Signed-off-by: Jonathan A. Kollasch <jakllsch@kollasch.net>
Reviewed-on: https://review.coreboot.org/10807
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Reviewed-by: Zheng Bao <fishbaozi@gmail.com>
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
This commit is contained in:
Jonathan A. Kollasch 2015-07-06 08:07:50 -05:00 committed by Stefan Reinauer
parent 7f1df8c0c1
commit 657d9cd548
1 changed files with 8 additions and 0 deletions
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8
src/superio/smsc/smscsuperio/early_serial.c
View File

@ -51,6 +51,14 @@ void smscsuperio_enable_serial(pnp_devfn_t dev, u16 iobase)
pnp_set_logical_device(dev); pnp_set_logical_device(dev);
pnp_set_enable(dev, 0); pnp_set_enable(dev, 0);
pnp_set_iobase(dev, PNP_IDX_IO0, iobase); pnp_set_iobase(dev, PNP_IDX_IO0, iobase);
switch (iobase) {
case 0x03f8:
pnp_set_irq(dev, PNP_IDX_IRQ0, 4);
break;
case 0x02f8:
pnp_set_irq(dev, PNP_IDX_IRQ0, 3);
break;
}
pnp_set_enable(dev, 1); pnp_set_enable(dev, 1);
pnp_exit_conf_state(dev); pnp_exit_conf_state(dev);
} }