src, util: Clean up makefile.inc in text, help & comments
Signed-off-by: Martin Roth <gaumless@gmail.com> Change-Id: Ib69236fb5d68272f92405512dc231fa75ecccaa6 Reviewed-on: https://review.coreboot.org/c/coreboot/+/80125 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Felix Singer <service+coreboot-gerrit@felixsinger.de> Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
This commit is contained in:
Martin Roth
Felix Held
parent
0825d90467
commit
659f97c621
13 changed files with 17 additions and 17 deletions
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@ -1492,7 +1492,7 @@ config MEMLAYOUT_LD_FILE
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This variable allows SoC/mainboard to supply in a custom linker file
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if required. This determines the linker file used for all the stages
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(bootblock, romstage, verstage, ramstage, postcar) in
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src/arch/${ARCH}/Makefile.inc.
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src/arch/${ARCH}/Makefile.mk.
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###############################################################################
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# Set default values for symbols created before mainboards. This allows the
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@ -6,7 +6,7 @@ FLASH@0x0 8M {
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FMAP@0x0 0x1000
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# bootblock includes trusted/non-trusted CLIB, CSIB,
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# and BL1FWs packaged in
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# src/soc/cavium/common/Makefile.inc.
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# src/soc/cavium/common/Makefile.mk.
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BOOTBLOCK@0x10000 0x70000
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COREBOOT(CBFS)@0x80000 0x77c000
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}
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@ -38,6 +38,6 @@ void variant_memory_init_params(FSPM_UPD *mupd, const int spd_index)
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int is_dual_channel(const int spd_index)
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{
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/* Per Makefile.inc, dual channel indices 1,3,5 */
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/* Per Makefile.mk, dual channel indices 1,3,5 */
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return (spd_index & 0x1);
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}
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@ -5,5 +5,5 @@ bct-cfg-$(CONFIG_NYAN_BIG_BCT_CFG_SPI) += spi.cfg
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bct-cfg-y += odmdata.cfg
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# Note when SDRAM config (sdram-*.cfg) files are changed, we have to regenerate
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# the include files (sdram-*.inc). See ../../nyan/bct/Makefile.inc for more
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# the include files (sdram-*.inc). See ../../nyan/bct/Makefile.mk for more
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# information.
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@ -5,5 +5,5 @@ bct-cfg-$(CONFIG_NYAN_BLAZE_BCT_CFG_SPI) += spi.cfg
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bct-cfg-y += odmdata.cfg
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# Note when SDRAM config (sdram-*.cfg) files are changed, we have to regenerate
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# the include files (sdram-*.inc). See ../../nyan/bct/Makefile.inc for more
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# the include files (sdram-*.inc). See ../../nyan/bct/Makefile.mk for more
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# information.
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@ -35,7 +35,7 @@ config VGA_BIOS_ID
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default "8086,22b0"
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help
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The VGA_BIOS_ID for the C0 version of the video BIOS is hardcoded
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in soc/intel/braswell/Makefile.inc as 8086,22b1
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in soc/intel/braswell/Makefile.mk as 8086,22b1
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config CBFS_SIZE
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default 0x200000
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@ -6,7 +6,7 @@ FLASH@0x0 16M {
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FMAP@0x0 0x1000
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# bootblock includes trusted/non-trusted CLIB, CSIB,
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# and BL1FWs packaged in
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# src/soc/cavium/common/Makefile.inc.
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# src/soc/cavium/common/Makefile.mk.
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BOOTBLOCK@0x10000 0x70000
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COREBOOT(CBFS)@0x80000 0xf7c000
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}
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@ -8,7 +8,7 @@ FLASH@0x0 16M {
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RO_FRID@0x1000 0x100
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# bootblock includes trusted/non-trusted CLIB, CSIB,
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# and BL1FWs packaged in
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# src/soc/cavium/common/Makefile.inc.
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# src/soc/cavium/common/Makefile.mk.
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BOOTBLOCK@0x10000 0x70000
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COREBOOT(CBFS)@0x80000 0x2fc000
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GBB@0x37c000 0x80000
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@ -57,7 +57,7 @@ config VGA_BIOS_ID
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default "8086,22b0"
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help
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The VGA_BIOS_ID for the C0 version of the video bios is hardcoded
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in soc/intel/braswell/Makefile.inc as 8086,22b1
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in soc/intel/braswell/Makefile.mk as 8086,22b1
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endif #RUN_FSP_GOP
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@ -4,7 +4,7 @@ bootblock-y += bootblock.c
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# The inclusion of romstage.c is not necessary here.
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# It is put down only to the better understanding.
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# The file is already included over src/arch/x86/Makefile.inc.
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# The file is already included over src/arch/x86/Makefile.mk.
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romstage-y += romstage.c
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ramstage-y += mainboard.c
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@ -65,7 +65,7 @@ swid-files-$(CONFIG_SBOM_SINIT_ACM) += $(CONFIG_SINIT_ACM_PATH)
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vboot-pkgconfig-files = $(obj)/external/vboot_reference-bootblock/vboot_host.pc $(obj)/external/vboot_reference-romstage/vboot_host.pc $(obj)/external/vboot_reference-ramstage/vboot_host.pc $(obj)/external/vboot_reference-postcar/vboot_host.pc
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swid-files-$(CONFIG_SBOM_VBOOT) += $(vboot-pkgconfig-files)
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$(vboot-pkgconfig-files): $(VBOOT_LIB_bootblock) $(VBOOT_LIB_romstage) $(VBOOT_LIB_ramstage) $(VBOOT_LIB_postcar) # src/security/vboot/Makefile.inc
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$(vboot-pkgconfig-files): $(VBOOT_LIB_bootblock) $(VBOOT_LIB_romstage) $(VBOOT_LIB_ramstage) $(VBOOT_LIB_postcar) # src/security/vboot/Makefile.mk
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ifeq ($(CONFIG_SBOM_COMPILER),y)
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compiler-toolchain = $(CC_bootblock) $(CC_romstage) $(CC_ramstage) $(CC_postcar) $(CC_verstage) $(LD_bootblock) $(LD_romstage) $(LD_ramstage) $(LD_postcar) $(LD_verstage) $(AS_bootblock) $(AS_romstage) $(AS_ramstage) $(AS_postcar) $(AS_verstage)
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@ -8,7 +8,7 @@ wildcards (e.g. source src/mainboard/*/Kconfig) which
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makes automatic inclusion of all boards a tedious task
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and prevents us from implementing "drop in" boards.
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In our Makefile.inc files we already include mainboard
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In our Makefile.mk files we already include mainboard
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directories per wildcard, so let's add the infrastructure
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to do the same with Kconfig.
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@ -28,7 +28,7 @@ Index: kconfig/lexer.l
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+++ kconfig/lexer.l
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@@ -8,6 +8,7 @@
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%{
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#include <assert.h>
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+#include <glob.h>
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#include <limits.h>
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@ -37,7 +37,7 @@ Index: kconfig/lexer.l
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@@ -439,6 +440,32 @@ void zconf_nextfile(const char *name)
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current_file = file;
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}
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+void zconf_nextfiles(const char *wildcard)
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+{
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+ glob_t g;
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@ -78,7 +78,7 @@ Index: kconfig/lkc.h
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+void zconf_nextfiles(const char *name);
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int zconf_lineno(void);
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const char *zconf_curname(void);
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Index: kconfig/parser.y
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===================================================================
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--- kconfig.orig/parser.y
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@ -91,4 +91,4 @@ Index: kconfig/parser.y
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+ zconf_nextfiles($2);
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free($2);
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};
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@ -259,7 +259,7 @@ remove_kconfigs() {
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remove_unused() {
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local dir
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# Most files can be removed simply by looking at the time, but
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# all Kconfig and Makefile.inc files in the entire tree are accessed
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# all Kconfig and Makefiles in the entire tree are accessed
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# whether they're used or not.
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remove_kconfigs
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