mb/asrock/b75pro3-m: Add CMOS layout/defaults and vbt.bin
The ASRock B75 Pro3-M port was lacking a cmos.default and cmos.layout, which means nvramtool could not be used to change any nvram values, and the defaults were always being used. I have "borrowed" the files from the similar h77pro4-m port, which work fine for the b75pro3-m. I can now adjust things like gfx_uma_size and power_on_after_fail, which are quite useful to be able to modify. Additionally, this board did not have a data.vbt, so I extracted vbt.bin from the VGABIOS and added it. Change-Id: I40822f2f7b013b7ac0658d66d7972b447066d593 Signed-off-by: Kevin Keijzer <kevin@quietlife.nl> Reviewed-on: https://review.coreboot.org/c/coreboot/+/73451 Reviewed-by: Fabian Groffen <grobian@gentoo.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Felix Singer <felixsinger@posteo.net>
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@ -8,6 +8,9 @@ config BOARD_SPECIFIC_OPTIONS
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select DRIVERS_ASMEDIA_ASPM_BLACKLIST
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select HAVE_ACPI_RESUME
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select HAVE_ACPI_TABLES
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select HAVE_CMOS_DEFAULT
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select HAVE_OPTION_TABLE
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select INTEL_GMA_HAVE_VBT
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select INTEL_INT15
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select MAINBOARD_HAS_LIBGFXINIT
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select NORTHBRIDGE_INTEL_SANDYBRIDGE
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@ -0,0 +1,7 @@
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boot_option=Fallback
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debug_level=Debug
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nmi=Disable
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power_on_after_fail=Disable
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sata_mode=AHCI
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gfx_uma_size=64M
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cpu_fan_tach_src=CPU_FAN1
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@ -0,0 +1,96 @@
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## SPDX-License-Identifier: GPL-2.0-only
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# -----------------------------------------------------------------
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entries
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# -----------------------------------------------------------------
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0 120 r 0 reserved_memory
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# -----------------------------------------------------------------
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# RTC_BOOT_BYTE (coreboot hardcoded)
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384 1 e 2 boot_option
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388 4 h 0 reboot_counter
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# -----------------------------------------------------------------
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# coreboot config options: console
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395 4 e 3 debug_level
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# coreboot config options: southbridge
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408 1 e 1 nmi
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409 2 e 4 power_on_after_fail
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411 2 e 5 sata_mode
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# coreboot config options: northbridge
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416 5 e 6 gfx_uma_size
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# coreboot config options: mainboard-specific
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421 2 e 7 cpu_fan_tach_src
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# coreboot config options: check sums
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984 16 h 0 check_sum
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# -----------------------------------------------------------------
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enumerations
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#ID value text
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# Generic on/off enum
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1 0 Disable
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1 1 Enable
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# boot_option
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2 0 Fallback
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2 1 Normal
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# debug_level
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3 0 Emergency
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3 1 Alert
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3 2 Critical
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3 3 Error
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3 4 Warning
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3 5 Notice
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3 6 Info
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3 7 Debug
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3 8 Spew
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# power_on_after_fail
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4 0 Disable
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4 1 Enable
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4 2 Keep
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# sata_mode
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5 0 AHCI
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5 1 Compatible
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5 2 Legacy
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# gfx_uma_size (Intel IGP Video RAM size)
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6 0 32M
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6 1 64M
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6 2 96M
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6 3 128M
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6 4 160M
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6 5 192M
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6 6 224M
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6 7 256M
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6 8 288M
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6 9 320M
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6 10 352M
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6 11 384M
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6 12 416M
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6 13 448M
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6 14 480M
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6 15 512M
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6 16 1024M
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# cpu_fan_header (select which header provides the tachometer
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# signal to the Super I/O on its CPUFANIN input)
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7 0 None
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7 1 CPU_FAN1
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7 2 CPU_FAN2
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7 3 Both
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# -----------------------------------------------------------------
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checksums
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checksum 392 423 984
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