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tegra132: add enums for bus names 

Instead of requiring the mainboards to know the magic
literals for the bus numbers provide an easier name to
number to handle all the weird ordering.

BUG=chrome-os-partner:31106
BRANCH=None
TEST=Built and booted on ryu.

Change-Id: I4a90f5f5f3ed1d936e2eee23f4726069adc49cc7
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Commit-Id: b028e90650384c947a3d0ee84c6d1346a22b22b9
Original-Change-Id: Id4d773d3049a43b186711900c61935ba7f3562ce
Original-Signed-off-by: Aaron Durbin <adurbin@chromium.org>
Original-Reviewed-on: https://chromium-review.googlesource.com/213491
Original-Reviewed-by: Furquan Shaikh <furquan@chromium.org>
Reviewed-on: http://review.coreboot.org/8996
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
This commit is contained in:
Aaron Durbin 2014-08-21 14:50:36 -05:00 committed by Patrick Georgi
parent 913067d44f
commit 65c5b9d431
1 changed files with 16 additions and 0 deletions
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16
src/soc/nvidia/tegra132/include/soc/funitcfg.h
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@ -42,6 +42,22 @@ enum {
FUNIT_INDEX_MAX, FUNIT_INDEX_MAX,
}; };
/*
* Note: these bus numbers are dependent on the driver implementations, and
* currently the I2C is 0-based and SPI is 1-based in its indexing.
*/
enum {
I2C2_BUS = 1,
I2C3_BUS = 2,
I2C5_BUS = 4,
I2CPWR_BUS = I2C5_BUS,
I2C6_BUS = 5,
SPI1_BUS = 1,
SPI4_BUS = 4,
};
struct funit_cfg { struct funit_cfg {
uint32_t funit_index; uint32_t funit_index;
uint32_t clk_src_id; uint32_t clk_src_id;