soc/amd: factor out common eMMC code

Signed-off-by: Felix Held <felix-coreboot@felixheld.de>
Change-Id: If5447f9272183f83bc422520ada93d3cfd96551e
Reviewed-on: https://review.coreboot.org/c/coreboot/+/68415
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Martin Roth <martin.roth@amd.corp-partner.google.com>
This commit is contained in:
Felix Held 2022-10-13 20:58:47 +02:00
parent 5e2f1b1e64
commit 65d73cc457
15 changed files with 13 additions and 54 deletions

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@ -46,6 +46,7 @@ config SOC_SPECIFIC_OPTIONS
select SOC_AMD_COMMON_BLOCK_APOB
select SOC_AMD_COMMON_BLOCK_BANKED_GPIOS
select SOC_AMD_COMMON_BLOCK_DATA_FABRIC
select SOC_AMD_COMMON_BLOCK_EMMC
select SOC_AMD_COMMON_BLOCK_GRAPHICS
select SOC_AMD_COMMON_BLOCK_HAS_ESPI
select SOC_AMD_COMMON_BLOCK_I2C

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@ -33,7 +33,6 @@ ramstage-y += agesa_acpi.c
ramstage-y += chip.c
ramstage-y += cpu.c
ramstage-y += data_fabric.c
ramstage-y += emmc.c
ramstage-y += fch.c
ramstage-y += fsp_s_params.c
ramstage-y += gpio.c

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@ -113,5 +113,5 @@ chip soc/amd/cezanne
device mmio 0xfedc5000 alias i2c_3 off ops soc_amd_i2c_mmio_ops end
device mmio 0xfedc9000 alias uart_0 off ops cezanne_uart_mmio_ops end
device mmio 0xfedca000 alias uart_1 off ops cezanne_uart_mmio_ops end
device mmio 0xfedd5000 alias emmc off ops cezanne_emmc_mmio_ops end
device mmio 0xfedd5000 alias emmc off ops amd_emmc_mmio_ops end
end

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@ -0,0 +1,4 @@
config SOC_AMD_COMMON_BLOCK_EMMC
bool
help
Select this option to use AMD common EMMC driver support.

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@ -0,0 +1 @@
ramstage-$(CONFIG_SOC_AMD_COMMON_BLOCK_EMMC) += emmc.c

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@ -15,7 +15,7 @@ static void emmc_enable(struct device *dev)
power_off_aoac_device(FCH_AOAC_DEV_EMMC);
}
struct device_operations cezanne_emmc_mmio_ops = {
struct device_operations amd_emmc_mmio_ops = {
.read_resources = emmc_read_resources,
.set_resources = noop_set_resources,
.scan_bus = scan_static_bus,

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@ -61,6 +61,7 @@ config SOC_SPECIFIC_OPTIONS
select SOC_AMD_COMMON_BLOCK_APOB_HASH
select SOC_AMD_COMMON_BLOCK_BANKED_GPIOS # TODO: Check if this is still correct
select SOC_AMD_COMMON_BLOCK_DATA_FABRIC
select SOC_AMD_COMMON_BLOCK_EMMC
select SOC_AMD_COMMON_BLOCK_ESPI_EXTENDED_DECODE_RANGES
select SOC_AMD_COMMON_BLOCK_GRAPHICS # TODO: Check if this is still correct
select SOC_AMD_COMMON_BLOCK_HAS_ESPI

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@ -36,7 +36,6 @@ ramstage-y += agesa_acpi.c
ramstage-y += chip.c
ramstage-y += cpu.c
ramstage-y += data_fabric.c
ramstage-y += emmc.c
ramstage-y += fch.c
ramstage-y += fsp_s_params.c
ramstage-y += gpio.c

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@ -93,5 +93,5 @@ chip soc/amd/mendocino
device mmio 0xfedce000 alias uart_2 off ops mendocino_uart_mmio_ops end
device mmio 0xfedcf000 alias uart_3 off ops mendocino_uart_mmio_ops end
device mmio 0xfedd1000 alias uart_4 off ops mendocino_uart_mmio_ops end
device mmio 0xfedd5000 alias emmc off ops mendocino_emmc_mmio_ops end
device mmio 0xfedd5000 alias emmc off ops amd_emmc_mmio_ops end
end

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@ -93,5 +93,5 @@ chip soc/amd/mendocino
device mmio 0xfedce000 alias uart_2 off ops mendocino_uart_mmio_ops end
device mmio 0xfedcf000 alias uart_3 off ops mendocino_uart_mmio_ops end
device mmio 0xfedd1000 alias uart_4 off ops mendocino_uart_mmio_ops end
device mmio 0xfedd5000 alias emmc off ops mendocino_emmc_mmio_ops end
device mmio 0xfedd5000 alias emmc off ops amd_emmc_mmio_ops end
end

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@ -1,23 +0,0 @@
/* SPDX-License-Identifier: GPL-2.0-only */
#include <amdblocks/aoac.h>
#include <device/device.h>
#include <soc/aoac_defs.h>
static void emmc_read_resources(struct device *dev)
{
mmio_resource_kb(dev, 0, dev->path.mmio.addr / KiB, 4);
}
static void emmc_enable(struct device *dev)
{
if (!dev->enabled)
power_off_aoac_device(FCH_AOAC_DEV_EMMC);
}
struct device_operations mendocino_emmc_mmio_ops = {
.read_resources = emmc_read_resources,
.set_resources = noop_set_resources,
.scan_bus = scan_static_bus,
.enable = emmc_enable,
};

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@ -51,6 +51,7 @@ config SOC_SPECIFIC_OPTIONS
select SOC_AMD_COMMON_BLOCK_APOB_HASH
select SOC_AMD_COMMON_BLOCK_BANKED_GPIOS
select SOC_AMD_COMMON_BLOCK_DATA_FABRIC
select SOC_AMD_COMMON_BLOCK_EMMC
select SOC_AMD_COMMON_BLOCK_ESPI_EXTENDED_DECODE_RANGES
select SOC_AMD_COMMON_BLOCK_GRAPHICS
select SOC_AMD_COMMON_BLOCK_HAS_ESPI

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@ -37,7 +37,6 @@ ramstage-y += agesa_acpi.c
ramstage-y += chip.c
ramstage-y += cpu.c
ramstage-y += data_fabric.c
ramstage-y += emmc.c
ramstage-y += fch.c
ramstage-y += fsp_s_params.c
ramstage-y += gpio.c

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@ -95,5 +95,5 @@ chip soc/amd/morgana
device mmio 0xfedce000 alias uart_2 off ops morgana_uart_mmio_ops end
device mmio 0xfedcf000 alias uart_3 off ops morgana_uart_mmio_ops end
device mmio 0xfedd1000 alias uart_4 off ops morgana_uart_mmio_ops end
device mmio 0xfedd5000 alias emmc off ops morgana_emmc_mmio_ops end
device mmio 0xfedd5000 alias emmc off ops amd_emmc_mmio_ops end
end

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@ -1,23 +0,0 @@
/* SPDX-License-Identifier: GPL-2.0-only */
#include <amdblocks/aoac.h>
#include <device/device.h>
#include <soc/aoac_defs.h>
static void emmc_read_resources(struct device *dev)
{
mmio_resource_kb(dev, 0, dev->path.mmio.addr / KiB, 4);
}
static void emmc_enable(struct device *dev)
{
if (!dev->enabled)
power_off_aoac_device(FCH_AOAC_DEV_EMMC);
}
struct device_operations morgana_emmc_mmio_ops = {
.read_resources = emmc_read_resources,
.set_resources = noop_set_resources,
.scan_bus = scan_static_bus,
.enable = emmc_enable,
};