mb/google/drallion: add dummy SPD file

Drallion will use soldered down memory. Add dummy spd file.

BUG=b:139397313
BRANCH=N/A
TEST=Build and check cbfs has the dummy spd.bin

Change-Id: Ife59c2dd689d72b117f30e832a3ce7eed4fa4220
Signed-off-by: Eric Lai <ericr_lai@compal.corp-partner.google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/35113
Reviewed-by: Mathew King <mathewk@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>

src/mainboard/google/drallion/Kconfig

@@ -8,7 +8,6 @@ config BOARD_GOOGLE_BASEBOARD_DRALLION
 	select DRIVERS_SPI_ACPI
 	select DRIVERS_USB_ACPI
 	select EC_GOOGLE_WILCO
-	select GENERIC_SPD_BIN
 	select GOOGLE_SMBIOS_MAINBOARD_VERSION
 	select HAVE_ACPI_RESUME
 	select HAVE_ACPI_TABLES
@@ -19,7 +18,6 @@ config BOARD_GOOGLE_BASEBOARD_DRALLION
 	select SOC_INTEL_COMETLAKE
 	select SOC_INTEL_COMMON_BLOCK_HDA_VERB
 	select SOC_INTEL_COMMON_BLOCK_SMM_ESPI_DISABLE
-	select SPD_READ_BY_WORD
 	select SYSTEM_TYPE_LAPTOP
 	select TPM2
 	select MAINBOARD_USES_IFD_EC_REGION

src/mainboard/google/drallion/Makefile.inc

@@ -36,3 +36,5 @@ verstage-y += ec.c
 
 subdirs-y += variants/$(VARIANT_DIR)
 CPPFLAGS_common += -I$(src)/mainboard/$(MAINBOARDDIR)/variants/$(VARIANT_DIR)/include
+
+subdirs-y += spd

src/mainboard/google/drallion/spd/Makefile.inc

@@ -0,0 +1,34 @@
+##
+## This file is part of the coreboot project.
+##
+## Copyright (C) 2018 Intel Corporation.
+##
+## This program is free software; you can redistribute it and/or modify
+## it under the terms of the GNU General Public License as published by
+## the Free Software Foundation; version 2 of the License.
+##
+## This program is distributed in the hope that it will be useful,
+## but WITHOUT ANY WARRANTY; without even the implied warranty of
+## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+## GNU General Public License for more details.
+##
+
+SPD_BIN = $(obj)/spd.bin
+
+ifeq ($(SPD_SOURCES),)
+	SPD_DEPS := $(error SPD_SOURCES is not set. Variant must provide this)
+else
+	SPD_DEPS := $(foreach f, $(SPD_SOURCES), src/mainboard/$(MAINBOARDDIR)/spd/$(f).spd.hex)
+endif
+
+# Include spd ROM data
+$(SPD_BIN): $(SPD_DEPS)
+	for f in $+; \
+	  do for c in $$(cat $$f | grep -v ^#); \
+	    do printf $$(printf '\%o' 0x$$c); \
+	  done; \
+	done > $@
+
+cbfs-files-y += spd.bin
+spd.bin-file := $(SPD_BIN)
+spd.bin-type := spd

src/mainboard/google/drallion/spd/empty_ddr4.spd.hex

@@ -0,0 +1,32 @@
+00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+00 80 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+00 80 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

src/mainboard/google/drallion/variants/arcada_cml/Makefile.inc

@@ -13,6 +13,9 @@
 ## GNU General Public License for more details.
 ##
 
+## GPP_F12-F16 indicates mem_id to match specific spd file
+SPD_SOURCES = empty_ddr4			# 0b00000
+
 bootblock-y += gpio.c
 ramstage-y += gpio.c
 romstage-y += gpio.c

src/mainboard/google/drallion/variants/drallion/Makefile.inc

@@ -13,6 +13,9 @@
 ## GNU General Public License for more details.
 ##
 
+## GPP_F12-F16 indicates mem_id to match specific spd file
+SPD_SOURCES = empty_ddr4	# 0b00000
+
 bootblock-y += gpio.c
 ramstage-y += gpio.c
 romstage-y += gpio.c

src/mainboard/google/drallion/variants/sarien_cml/Makefile.inc

@@ -13,6 +13,9 @@
 ## GNU General Public License for more details.
 ##
 
+## GPP_F12-F16 indicates mem_id to match specific spd file
+SPD_SOURCES = empty_ddr4			# 0b00000
+
 bootblock-y += gpio.c
 ramstage-y += gpio.c
 romstage-y += gpio.c