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Only show the USB Debug Port kconfig option to the user if a mainboard 

is selected that uses a chipset which actually has that functionality _and_
we have code to initialize the Debug Port in coreboot (for that chipset).

Also, remove the duplicate list of PCI IDs and just link to the wiki page at:

  http://www.coreboot.org/EHCI_Debug_Port

The list is now less useful in the kconfig help as this option will only
appear for those boards where it's actually supported.

Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Peter Stuge <peter@stuge.se>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5848 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
This commit is contained in:
Uwe Hermann 2010-09-26 07:35:55 +00:00
parent dc3aa7abff
commit 65e60344ad
6 changed files with 17 additions and 19 deletions
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30
src/console/Kconfig
View File

@ -84,38 +84,30 @@ config TTYS0_LCS
default 3
depends on CONSOLE_SERIAL8250
# TODO: FIX DEPENDENCY HERE
# Use "select HAVE_USBDEBUG" on southbridges which have Debug Port code.
config HAVE_USBDEBUG
def_bool n
config USBDEBUG
bool "USB 2.0 EHCI debug dongle support"
default n
depends on HAVE_USBDEBUG
help
This option allows you to use a so-called USB EHCI Debug device
(such as the Ajays NET20DC, AMIDebug RX, or a system using the
Linux "EHCI Debug Device gadget" driver found in recent kernel)
to retrieve the coreboot debug messages (instead, or in addition
to, a serial port).
This feature is NOT supported on all chipsets in coreboot!
It also requires a USB2 controller which supports the EHCI
Debug Port capability. Controllers which are known to work:
Debug Port capability.
* 10b9:5239 ALi Corporation USB 2.0 (USB PCI card)
* 8086:24cd Intel ICH4/ICH4-M
* 8086:24dd Intel ICH5
* 8086:265c Intel ICH6
* 8086:268c Intel 631xESB/632xESB/3100
* 8086:27cc Intel ICH7
* 8086:2836 Intel ICH8
* 8086:283a Intel ICH8
* 8086:293a Intel ICH9
* 10de:0088 NVIDIA MCP2A
* 10de:005b NVIDIA CK804
* 10de:026e NVIDIA MCP51
* 10de:036d NVIDIA MCP55
* 10de:03f2 NVIDIA MCP61
* 1002:4386 ATI/AMD SB600
* 1106:3104 VIA VX800
See http://www.coreboot.org/EHCI_Debug_Port for an up-to-date list
of supported controllers.
See http://www.coreboot.org/EHCI_Debug_Port for an up-to-date list.
If unsure, say N.
config CONSOLE_VGA
bool "Use VGA console once initialized"

2
src/southbridge/amd/sb600/Kconfig
View File

@ -20,3 +20,5 @@
config SOUTHBRIDGE_AMD_SB600
bool
select IOAPIC
select HAVE_USBDEBUG

1
src/southbridge/amd/sb700/Kconfig
View File

@ -20,6 +20,7 @@
config SOUTHBRIDGE_AMD_SB700
bool
select IOAPIC
select HAVE_USBDEBUG
config SOUTHBRIDGE_AMD_SB700_SKIP_ISA_DMA_INIT
bool

1
src/southbridge/intel/i82801gx/Kconfig
View File

@ -21,5 +21,6 @@ config SOUTHBRIDGE_INTEL_I82801GX
bool
select IOAPIC
select HAVE_HARD_RESET
select HAVE_USBDEBUG
select USE_WATCHDOG_ON_BOOT

1
src/southbridge/nvidia/mcp55/Kconfig
View File

@ -1,6 +1,7 @@
config SOUTHBRIDGE_NVIDIA_MCP55
bool
select IOAPIC
select HAVE_USBDEBUG
config ID_SECTION_OFFSET
hex

1
src/southbridge/sis/sis966/Kconfig
View File

@ -1,6 +1,7 @@
config SOUTHBRIDGE_SIS_SIS966
bool
select IOAPIC
select HAVE_USBDEBUG
config ID_SECTION_OFFSET
hex