southbridge/amd: Remove trailing whitespace

Change-Id: I25cdfe6b3c8067793620677c62251e78704f7851
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: http://review.coreboot.org/6334
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
This commit is contained in:
Elyes HAOUAS 2014-07-22 23:12:38 +02:00 committed by Patrick Georgi
parent aedcc10ad3
commit 65fa598d2a
6 changed files with 50 additions and 50 deletions

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@ -17,8 +17,8 @@
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
*/ */
#ifndef _HUDSON_EARLY_SETUP_C_ #ifndef _HUDSON_EARLY_SETUP_C_
#define _HUDSON_EARLY_SETUP_C_ #define _HUDSON_EARLY_SETUP_C_
#include <stdint.h> #include <stdint.h>
#include <arch/io.h> #include <arch/io.h>

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@ -17,8 +17,8 @@
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
*/ */
#ifndef _HUDSON_SMBUS_C_ #ifndef _HUDSON_SMBUS_C_
#define _HUDSON_SMBUS_C_ #define _HUDSON_SMBUS_C_
#include <io.h> #include <io.h>
#include <stdint.h> #include <stdint.h>

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@ -21,8 +21,8 @@
* *
*/ */
#ifndef _AMD_SBPLATFORM_H_ #ifndef _AMD_SBPLATFORM_H_
#define _AMD_SBPLATFORM_H_ #define _AMD_SBPLATFORM_H_
#include <stddef.h> #include <stddef.h>
@ -162,7 +162,7 @@ typedef union _PCI_ADDR {
#include <spi-generic.h> #include <spi-generic.h>
#endif #endif
#define BIOSRAM_INDEX 0xcd4 #define BIOSRAM_INDEX 0xcd4
#define BIOSRAM_DATA 0xcd5 #define BIOSRAM_DATA 0xcd5
#endif // _AMD_SBPLATFORM_H_ #endif // _AMD_SBPLATFORM_H_

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@ -21,8 +21,8 @@
* *
*/ */
#ifndef _AMD_SBPLATFORM_H_ #ifndef _AMD_SBPLATFORM_H_
#define _AMD_SBPLATFORM_H_ #define _AMD_SBPLATFORM_H_
#include <stddef.h> #include <stddef.h>
@ -107,48 +107,48 @@ typedef union _PCI_ADDR {
* FusionMsgCMultiCore CIMx take over User (Setup Option) User (Setup Option) Disable * FusionMsgCMultiCore CIMx take over User (Setup Option) User (Setup Option) Disable
* FusionMsgCStage CIMx take over User (Setup Option) User (Setup Option) Disable * FusionMsgCStage CIMx take over User (Setup Option) User (Setup Option) Disable
*/ */
#define SB_CIMx_PARAMETER 0x02 #define SB_CIMx_PARAMETER 0x02
// Generic // Generic
#define cimSpreadSpectrumDefault TRUE #define cimSpreadSpectrumDefault TRUE
#define cimSpreadSpectrumTypeDefault 0x00 // Normal #define cimSpreadSpectrumTypeDefault 0x00 // Normal
#define cimHpetTimerDefault TRUE #define cimHpetTimerDefault TRUE
#define cimHpetMsiDisDefault FALSE // Enable #define cimHpetMsiDisDefault FALSE // Enable
#define cimIrConfigDefault 0x00 // Disable #define cimIrConfigDefault 0x00 // Disable
#define cimSpiFastReadEnableDefault 0x00 // Disable #define cimSpiFastReadEnableDefault 0x00 // Disable
#define cimSpiFastReadSpeedDefault 0x00 // NULL #define cimSpiFastReadSpeedDefault 0x00 // NULL
// GPP/AB Controller // GPP/AB Controller
#define cimNbSbGen2Default TRUE #define cimNbSbGen2Default TRUE
#define cimAlinkPhyPllPowerDownDefault TRUE #define cimAlinkPhyPllPowerDownDefault TRUE
#define cimResetCpuOnSyncFloodDefault TRUE #define cimResetCpuOnSyncFloodDefault TRUE
#define cimGppGen2Default FALSE #define cimGppGen2Default FALSE
#define cimGppMemWrImproveDefault TRUE #define cimGppMemWrImproveDefault TRUE
#define cimGppPortAspmDefault FALSE #define cimGppPortAspmDefault FALSE
#define cimGppLaneReversalDefault FALSE #define cimGppLaneReversalDefault FALSE
#define cimGppPhyPllPowerDownDefault TRUE #define cimGppPhyPllPowerDownDefault TRUE
// USB Controller // USB Controller
#define cimUsbPhyPowerDownDefault FALSE #define cimUsbPhyPowerDownDefault FALSE
// GEC Controller // GEC Controller
#define cimSBGecDebugBusDefault FALSE #define cimSBGecDebugBusDefault FALSE
#define cimSBGecPwrDefault 0x03 #define cimSBGecPwrDefault 0x03
// Sata Controller // Sata Controller
#define cimSataSetMaxGen2Default 0x00 #define cimSataSetMaxGen2Default 0x00
#define cimSATARefClkSelDefault 0x10 #define cimSATARefClkSelDefault 0x10
#define cimSATARefDivSelDefault 0x80 #define cimSATARefDivSelDefault 0x80
#define cimSataAggrLinkPmCapDefault TRUE #define cimSataAggrLinkPmCapDefault TRUE
#define cimSataPortMultCapDefault TRUE #define cimSataPortMultCapDefault TRUE
#define cimSataPscCapDefault 0x00 // Enable #define cimSataPscCapDefault 0x00 // Enable
#define cimSataSscCapDefault 0x00 // Enable #define cimSataSscCapDefault 0x00 // Enable
#define cimSataFisBasedSwitchingDefault FALSE #define cimSataFisBasedSwitchingDefault FALSE
#define cimSataCccSupportDefault FALSE #define cimSataCccSupportDefault FALSE
#define cimSataClkAutoOffDefault FALSE #define cimSataClkAutoOffDefault FALSE
#define cimNativepciesupportDefault FALSE #define cimNativepciesupportDefault FALSE
// Fusion Related // Fusion Related
#define cimAcDcMsgDefault FALSE #define cimAcDcMsgDefault FALSE
#define cimTimerTickTrackDefault FALSE #define cimTimerTickTrackDefault FALSE
#define cimClockInterruptTagDefault FALSE #define cimClockInterruptTagDefault FALSE
#define cimOhciTrafficHandingDefault FALSE #define cimOhciTrafficHandingDefault FALSE
#define cimEhciTrafficHandingDefault FALSE #define cimEhciTrafficHandingDefault FALSE
#define cimFusionMsgCMultiCoreDefault FALSE #define cimFusionMsgCMultiCoreDefault FALSE
#define cimFusionMsgCStageDefault FALSE #define cimFusionMsgCStageDefault FALSE
#endif // _AMD_SBPLATFORM_H_ #endif // _AMD_SBPLATFORM_H_

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@ -17,8 +17,8 @@
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
*/ */
#ifndef _SB800_EARLY_SETUP_C_ #ifndef _SB800_EARLY_SETUP_C_
#define _SB800_EARLY_SETUP_C_ #define _SB800_EARLY_SETUP_C_
#include <reset.h> #include <reset.h>
#include <arch/acpi.h> #include <arch/acpi.h>

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@ -17,8 +17,8 @@
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
*/ */
#ifndef _SB800_SMBUS_C_ #ifndef _SB800_SMBUS_C_
#define _SB800_SMBUS_C_ #define _SB800_SMBUS_C_
#include "smbus.h" #include "smbus.h"