flashrom: Document the newly supported IBM x3455 board and the
now-supported Broadcom HT-1000 chipset (trivial). Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2713 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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@ -53,6 +53,7 @@ no LinuxBIOS table is found:
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* IWILL DK8-HTX: use -m iwill:dk8_htx
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* Agami Aruma: use -m AGAMI:ARUMA
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* ASUS P5A: use -m asus:p5a
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* IBM x3455: use -m ibm:x3455
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ROM Layout Support
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@ -153,6 +154,7 @@ AMD CS5530
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AMD Geode SC1100
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AMD AMD-8111
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ATI SB400
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Broadcom HT-1000
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Intel ICH0-ICH8 (all variations)
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Intel PIIX4/PIIX4E/PIIX4M
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NVIDIA CK804
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@ -250,10 +250,10 @@ static int board_ibm_x3455(const char *name)
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{
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uint8_t byte;
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/* Set GPIO lines in HT1000 southbridge */
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/* Set GPIO lines in the Broadcom HT-1000 southbridge. */
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outb(0x45, 0xcd6);
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byte = inb(0xcd7);
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outb(byte|0x20, 0xcd7);
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outb(byte | 0x20, 0xcd7);
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return 0;
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}
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@ -387,12 +387,11 @@ static int enable_flash_mcp55(struct pci_dev *dev, char *name)
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}
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static int enable_flash_ht1000(struct pci_dev *dev, char *name)
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{
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unsigned char byte;
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uint8_t byte;
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/* Set the 4MB enable bit */
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/* Set the 4MB enable bit. */
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byte = pci_read_byte(dev, 0x41);
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byte |= 0x0e;
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pci_write_byte(dev, 0x41, byte);
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@ -462,7 +461,7 @@ static FLASH_ENABLE enables[] = {
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{0x1002, 0x4377, "ATI SB400", enable_flash_sb400}, /* ATI Technologies Inc IXP SB400 PCI-ISA Bridge (rev 80) */
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{0x1166, 0x0205, "BCM HT1000", enable_flash_ht1000},
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{0x1166, 0x0205, "Broadcom HT-1000", enable_flash_ht1000},
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};
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/*
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