ACPI: Select ACPI_SOC_NVS only where suitable

Having some symmetry with <soc/nvs.h> now allows to reduce
the amount of gluelogic to determine the size and cbmc field
of struct global_nvs.

Since GNVS creation is now controlled by ACPI_SOC_NVS,
drivers/amd/agesa/nvs.c becomes obsolete and soc/amd/cezanne
cannot have this selected until <soc/nvs.h> exists.

Change-Id: Ia9ec853ff7f5e7908f7e8fc179ac27d0da08e19d
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/49344
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by: Lance Zhao
This commit is contained in:
Kyösti Mälkki 2020-12-29 06:26:21 +02:00 committed by Patrick Georgi
parent 286a0572e7
commit 661ad4666c
123 changed files with 121 additions and 180 deletions

View file

@ -15,9 +15,13 @@ uint32_t *gnvs_cbmc_ptr(struct global_nvs *gnvs)
}
/* Some <soc/nvs.h> have no chromeos entry. */
#if CONFIG(MAINBOARD_HAS_CHROMEOS)
void *gnvs_chromeos_ptr(struct global_nvs *gnvs)
{
#if CONFIG(BOARD_EMULATION_QEMU_X86_Q35)
return NULL;
#elif CONFIG(MAINBOARD_HAS_CHROMEOS)
return &gnvs->chromeos;
}
#else
return NULL;
#endif
}

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@ -20,7 +20,6 @@ ramstage-y += def_callouts.c
ramstage-y += eventlog.c
ramstage-y += heapmanager.c
ramstage-y += acpi_tables.c
ramstage-y += nvs.c
romstage-$(CONFIG_CPU_AMD_AGESA) += oem_s3.c
ramstage-$(CONFIG_CPU_AMD_AGESA) += oem_s3.c s3_mtrr.c

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@ -1,9 +0,0 @@
/* SPDX-License-Identifier: GPL-2.0-or-later */
#include <acpi/acpi_gnvs.h>
#include <stdint.h>
size_t gnvs_size_of_array(void)
{
return 0;
}

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@ -449,7 +449,7 @@ void main(void)
threads_initialize();
/* Initialise GNVS early. */
if (CONFIG(HAVE_ACPI_TABLES))
if (CONFIG(ACPI_SOC_NVS))
gnvs_get_or_create();
/* Schedule the static boot state entries. */

View file

@ -1,7 +1,7 @@
/* SPDX-License-Identifier: GPL-2.0-only */
#include <acpi/acpi_gnvs.h>
#include <southbridge/intel/i82801jx/nvs.h>
#include <soc/nvs.h>
void mainboard_fill_gnvs(struct global_nvs *gnvs)
{

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@ -1,7 +1,7 @@
/* SPDX-License-Identifier: GPL-2.0-only */
#include <acpi/acpi_gnvs.h>
#include <southbridge/intel/i82801gx/nvs.h>
#include <soc/nvs.h>
void mainboard_fill_gnvs(struct global_nvs *gnvs)
{

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@ -2,7 +2,7 @@
#include <console/console.h>
#include <cpu/x86/smm.h>
#include <southbridge/intel/i82801gx/nvs.h>
#include <soc/nvs.h>
#include <southbridge/intel/common/pmutil.h>
#define GPE_EC_SCI 12

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@ -1,7 +1,7 @@
/* SPDX-License-Identifier: GPL-2.0-only */
#include <acpi/acpi_gnvs.h>
#include <southbridge/intel/bd82x6x/nvs.h>
#include <soc/nvs.h>
void mainboard_fill_gnvs(struct global_nvs *gnvs)
{

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@ -1,7 +1,7 @@
/* SPDX-License-Identifier: GPL-2.0-only */
#include <acpi/acpi_gnvs.h>
#include <southbridge/intel/bd82x6x/nvs.h>
#include <soc/nvs.h>
void mainboard_fill_gnvs(struct global_nvs *gnvs)
{

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@ -1,7 +1,7 @@
/* SPDX-License-Identifier: GPL-2.0-only */
#include <acpi/acpi_gnvs.h>
#include <southbridge/intel/lynxpoint/nvs.h>
#include <soc/nvs.h>
void mainboard_fill_gnvs(struct global_nvs *gnvs)
{

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@ -1,7 +1,7 @@
/* SPDX-License-Identifier: GPL-2.0-only */
#include <acpi/acpi_gnvs.h>
#include <southbridge/intel/i82801gx/nvs.h>
#include <soc/nvs.h>
void mainboard_fill_gnvs(struct global_nvs *gnvs)
{

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@ -1,7 +1,7 @@
/* SPDX-License-Identifier: GPL-2.0-only */
#include <acpi/acpi_gnvs.h>
#include <southbridge/intel/i82801jx/nvs.h>
#include <soc/nvs.h>
void mainboard_fill_gnvs(struct global_nvs *gnvs)
{

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@ -2,7 +2,7 @@
#include <acpi/acpigen.h>
#include <acpi/acpi_gnvs.h>
#include <southbridge/intel/i82801jx/nvs.h>
#include <soc/nvs.h>
void mainboard_fill_gnvs(struct global_nvs *gnvs)
{

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@ -1,7 +1,7 @@
/* SPDX-License-Identifier: GPL-2.0-only */
#include <acpi/acpi_gnvs.h>
#include <southbridge/intel/i82801gx/nvs.h>
#include <soc/nvs.h>
void mainboard_fill_gnvs(struct global_nvs *gnvs)
{

View file

@ -1,7 +1,7 @@
/* SPDX-License-Identifier: GPL-2.0-only */
#include <acpi/acpi_gnvs.h>
#include <southbridge/intel/bd82x6x/nvs.h>
#include <soc/nvs.h>
void mainboard_fill_gnvs(struct global_nvs *gnvs)
{

View file

@ -1,7 +1,7 @@
/* SPDX-License-Identifier: GPL-2.0-only */
#include <acpi/acpi_gnvs.h>
#include <southbridge/intel/bd82x6x/nvs.h>
#include <soc/nvs.h>
void mainboard_fill_gnvs(struct global_nvs *gnvs)
{

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@ -1,7 +1,7 @@
/* SPDX-License-Identifier: GPL-2.0-only */
#include <acpi/acpi_gnvs.h>
#include <southbridge/intel/bd82x6x/nvs.h>
#include <soc/nvs.h>
void mainboard_fill_gnvs(struct global_nvs *gnvs)
{

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@ -1,7 +1,7 @@
/* SPDX-License-Identifier: GPL-2.0-only */
#include <acpi/acpi_gnvs.h>
#include <southbridge/intel/bd82x6x/nvs.h>
#include <soc/nvs.h>
void mainboard_fill_gnvs(struct global_nvs *gnvs)
{

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@ -1,7 +1,7 @@
/* SPDX-License-Identifier: GPL-2.0-only */
#include <acpi/acpi_gnvs.h>
#include <southbridge/intel/bd82x6x/nvs.h>
#include <soc/nvs.h>
/* FIXME: check this function. */
void mainboard_fill_gnvs(struct global_nvs *gnvs)

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@ -1,7 +1,7 @@
/* SPDX-License-Identifier: GPL-2.0-only */
#include <acpi/acpi_gnvs.h>
#include <southbridge/intel/bd82x6x/nvs.h>
#include <soc/nvs.h>
void mainboard_fill_gnvs(struct global_nvs *gnvs)
{

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@ -11,7 +11,7 @@
#include "../qemu-i440fx/fw_cfg.h"
#include "../qemu-i440fx/acpi.h"
#include <southbridge/intel/i82801ix/nvs.h>
#include <soc/nvs.h>
void mainboard_fill_gnvs(struct global_nvs *gnvs)
{

View file

@ -1,7 +1,7 @@
/* SPDX-License-Identifier: GPL-2.0-only */
#include <acpi/acpi_gnvs.h>
#include <southbridge/intel/i82801gx/nvs.h>
#include <soc/nvs.h>
void mainboard_fill_gnvs(struct global_nvs *gnvs)
{

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@ -5,7 +5,7 @@
#include <acpi/acpi.h>
#include <acpi/acpi_gnvs.h>
#include <device/device.h>
#include <southbridge/intel/i82801gx/nvs.h>
#include <soc/nvs.h>
#include "mainboard.h"

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@ -4,7 +4,7 @@
#include <console/console.h>
#include <cpu/x86/smm.h>
#include <southbridge/intel/i82801gx/i82801gx.h>
#include <southbridge/intel/i82801gx/nvs.h>
#include <soc/nvs.h>
#include <southbridge/intel/common/gpio.h>
#include <ec/acpi/ec.h>
#include "ec_oem.c"

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@ -1,7 +1,7 @@
/* SPDX-License-Identifier: GPL-2.0-only */
#include <acpi/acpi_gnvs.h>
#include <southbridge/intel/bd82x6x/nvs.h>
#include <soc/nvs.h>
#include "thermal.h"
void mainboard_fill_gnvs(struct global_nvs *gnvs)

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@ -1,7 +1,7 @@
/* SPDX-License-Identifier: GPL-2.0-only */
#include <acpi/acpi_gnvs.h>
#include <southbridge/intel/i82801gx/nvs.h>
#include <soc/nvs.h>
void mainboard_fill_gnvs(struct global_nvs *gnvs)
{

View file

@ -3,7 +3,7 @@
#include <acpi/acpi.h>
#include <acpi/acpi_gnvs.h>
#include <device/device.h>
#include <southbridge/intel/lynxpoint/nvs.h>
#include <soc/nvs.h>
#include <southbridge/intel/lynxpoint/pch.h>
#include <variant/thermal.h>

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@ -5,7 +5,7 @@
#include <cpu/x86/smm.h>
#include <northbridge/intel/haswell/haswell.h>
#include <southbridge/intel/lynxpoint/me.h>
#include <southbridge/intel/lynxpoint/nvs.h>
#include <soc/nvs.h>
#include <southbridge/intel/lynxpoint/pch.h>
#include <superio/ite/it8772f/it8772f.h>

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@ -1,7 +1,7 @@
/* SPDX-License-Identifier: GPL-2.0-only */
#include <acpi/acpi_gnvs.h>
#include <southbridge/intel/bd82x6x/nvs.h>
#include <soc/nvs.h>
#include "thermal.h"
void mainboard_fill_gnvs(struct global_nvs *gnvs)

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@ -3,7 +3,7 @@
#include <acpi/acpi_gnvs.h>
#include <console/console.h>
#include <cpu/x86/smm.h>
#include <southbridge/intel/bd82x6x/nvs.h>
#include <soc/nvs.h>
#include <southbridge/intel/bd82x6x/pch.h>
#include <southbridge/intel/bd82x6x/me.h>
#include <northbridge/intel/sandybridge/sandybridge.h>

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@ -1,7 +1,7 @@
/* SPDX-License-Identifier: GPL-2.0-only */
#include <acpi/acpi_gnvs.h>
#include <southbridge/intel/bd82x6x/nvs.h>
#include <soc/nvs.h>
#include "thermal.h"
void mainboard_fill_gnvs(struct global_nvs *gnvs)

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@ -4,7 +4,7 @@
#include <acpi/acpi_gnvs.h>
#include <console/console.h>
#include <cpu/x86/smm.h>
#include <southbridge/intel/bd82x6x/nvs.h>
#include <soc/nvs.h>
#include <southbridge/intel/bd82x6x/pch.h>
#include <southbridge/intel/bd82x6x/me.h>
#include <southbridge/intel/common/pmbase.h>

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@ -7,7 +7,7 @@
#include "ec.h"
#include <southbridge/intel/bd82x6x/pch.h>
#include <southbridge/intel/bd82x6x/nvs.h>
#include <soc/nvs.h>
#include "thermal.h"
#include "onboard.h"

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@ -2,7 +2,7 @@
#include <console/console.h>
#include <cpu/x86/smm.h>
#include <southbridge/intel/bd82x6x/nvs.h>
#include <soc/nvs.h>
#include <southbridge/intel/bd82x6x/pch.h>
#include <southbridge/intel/bd82x6x/me.h>
#include <southbridge/intel/common/pmutil.h>

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@ -4,7 +4,7 @@
#include <acpi/acpi_gnvs.h>
#include <device/device.h>
#include <southbridge/intel/lynxpoint/pch.h>
#include <southbridge/intel/lynxpoint/nvs.h>
#include <soc/nvs.h>
#include "thermal.h"

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@ -4,7 +4,7 @@
#include <arch/io.h>
#include <console/console.h>
#include <cpu/x86/smm.h>
#include <southbridge/intel/lynxpoint/nvs.h>
#include <soc/nvs.h>
#include <southbridge/intel/lynxpoint/pch.h>
#include <southbridge/intel/common/gpio.h>
#include <southbridge/intel/lynxpoint/me.h>

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@ -9,7 +9,7 @@
#include "onboard.h"
#include <southbridge/intel/bd82x6x/pch.h>
#include <southbridge/intel/bd82x6x/nvs.h>
#include <soc/nvs.h>
#include "thermal.h"
void mainboard_fill_gnvs(struct global_nvs *gnvs)

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@ -4,7 +4,7 @@
#include <device/pci_ops.h>
#include <console/console.h>
#include <cpu/x86/smm.h>
#include <southbridge/intel/bd82x6x/nvs.h>
#include <soc/nvs.h>
#include <southbridge/intel/bd82x6x/pch.h>
#include <southbridge/intel/bd82x6x/me.h>
#include <southbridge/intel/common/pmbase.h>

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@ -1,7 +1,7 @@
/* SPDX-License-Identifier: GPL-2.0-only */
#include <acpi/acpi_gnvs.h>
#include <southbridge/intel/bd82x6x/nvs.h>
#include <soc/nvs.h>
void mainboard_fill_gnvs(struct global_nvs *gnvs)
{

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@ -1,7 +1,7 @@
/* SPDX-License-Identifier: GPL-2.0-only */
#include <acpi/acpi_gnvs.h>
#include <southbridge/intel/lynxpoint/nvs.h>
#include <soc/nvs.h>
void mainboard_fill_gnvs(struct global_nvs *gnvs)
{

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@ -1,7 +1,7 @@
/* SPDX-License-Identifier: GPL-2.0-only */
#include <acpi/acpi_gnvs.h>
#include <southbridge/intel/bd82x6x/nvs.h>
#include <soc/nvs.h>
void mainboard_fill_gnvs(struct global_nvs *gnvs)
{

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@ -1,7 +1,7 @@
/* SPDX-License-Identifier: GPL-2.0-only */
#include <acpi/acpi_gnvs.h>
#include <southbridge/intel/bd82x6x/nvs.h>
#include <soc/nvs.h>
void mainboard_fill_gnvs(struct global_nvs *gnvs)
{

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@ -1,7 +1,7 @@
/* SPDX-License-Identifier: GPL-2.0-only */
#include <acpi/acpi_gnvs.h>
#include <southbridge/intel/i82801gx/nvs.h>
#include <soc/nvs.h>
void mainboard_fill_gnvs(struct global_nvs *gnvs)
{

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@ -4,7 +4,7 @@
#include <acpi/acpi_gnvs.h>
#include <device/device.h>
#include <southbridge/intel/lynxpoint/pch.h>
#include <southbridge/intel/lynxpoint/nvs.h>
#include <soc/nvs.h>
#include "thermal.h"

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@ -3,7 +3,7 @@
#include <acpi/acpi.h>
#include <arch/io.h>
#include <cpu/x86/smm.h>
#include <southbridge/intel/lynxpoint/nvs.h>
#include <soc/nvs.h>
#include <southbridge/intel/lynxpoint/pch.h>
#include <southbridge/intel/lynxpoint/me.h>
#include <northbridge/intel/haswell/haswell.h>

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@ -1,7 +1,7 @@
/* SPDX-License-Identifier: GPL-2.0-only */
#include <acpi/acpi_gnvs.h>
#include <southbridge/intel/bd82x6x/nvs.h>
#include <soc/nvs.h>
#include "thermal.h"
void mainboard_fill_gnvs(struct global_nvs *gnvs)

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@ -1,7 +1,7 @@
/* SPDX-License-Identifier: GPL-2.0-only */
#include <acpi/acpi_gnvs.h>
#include <southbridge/intel/i82801gx/nvs.h>
#include <soc/nvs.h>
void mainboard_fill_gnvs(struct global_nvs *gnvs)
{

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@ -1,7 +1,7 @@
/* SPDX-License-Identifier: GPL-2.0-only */
#include <acpi/acpi_gnvs.h>
#include <southbridge/intel/i82801jx/nvs.h>
#include <soc/nvs.h>
void mainboard_fill_gnvs(struct global_nvs *gnvs)
{

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@ -3,7 +3,7 @@
#include <acpi/acpi.h>
#include <acpi/acpi_gnvs.h>
#include <device/device.h>
#include <southbridge/intel/bd82x6x/nvs.h>
#include <soc/nvs.h>
#include "thermal.h"

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@ -3,7 +3,7 @@
#include <acpi/acpi.h>
#include <arch/io.h>
#include <cpu/x86/smm.h>
#include <southbridge/intel/bd82x6x/nvs.h>
#include <soc/nvs.h>
#include <southbridge/intel/bd82x6x/pch.h>
#include <southbridge/intel/bd82x6x/me.h>
#include <northbridge/intel/sandybridge/sandybridge.h>

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@ -1,7 +1,7 @@
/* SPDX-License-Identifier: GPL-2.0-only */
#include <acpi/acpi_gnvs.h>
#include <southbridge/intel/i82801gx/nvs.h>
#include <soc/nvs.h>
void mainboard_fill_gnvs(struct global_nvs *gnvs)
{

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@ -1,7 +1,7 @@
/* SPDX-License-Identifier: GPL-2.0-only */
#include <acpi/acpi_gnvs.h>
#include <southbridge/intel/bd82x6x/nvs.h>
#include <soc/nvs.h>
#include "thermal.h"
void mainboard_fill_gnvs(struct global_nvs *gnvs)

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@ -1,7 +1,7 @@
/* SPDX-License-Identifier: GPL-2.0-only */
#include <acpi/acpi_gnvs.h>
#include <southbridge/intel/bd82x6x/nvs.h>
#include <soc/nvs.h>
void mainboard_fill_gnvs(struct global_nvs *gnvs)
{

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@ -1,7 +1,7 @@
/* SPDX-License-Identifier: GPL-2.0-only */
#include <acpi/acpi_gnvs.h>
#include <southbridge/intel/bd82x6x/nvs.h>
#include <soc/nvs.h>
void mainboard_fill_gnvs(struct global_nvs *gnvs)
{

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@ -5,7 +5,7 @@
#include <acpi/acpi_gnvs.h>
#include <arch/smp/mpspec.h>
#include <device/device.h>
#include <southbridge/intel/i82801ix/nvs.h>
#include <soc/nvs.h>
void mainboard_fill_gnvs(struct global_nvs *gnvs)
{

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@ -1,7 +1,7 @@
/* SPDX-License-Identifier: GPL-2.0-only */
#include <acpi/acpi_gnvs.h>
#include <southbridge/intel/ibexpeak/nvs.h>
#include <soc/nvs.h>
void mainboard_fill_gnvs(struct global_nvs *gnvs)
{

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@ -3,7 +3,7 @@
#include <arch/io.h>
#include <console/console.h>
#include <cpu/x86/smm.h>
#include <southbridge/intel/ibexpeak/nvs.h>
#include <soc/nvs.h>
#include <southbridge/intel/common/pmutil.h>
#include <northbridge/intel/ironlake/ironlake.h>
#include <ec/acpi/ec.h>

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@ -1,7 +1,7 @@
/* SPDX-License-Identifier: GPL-2.0-only */
#include <acpi/acpi_gnvs.h>
#include <southbridge/intel/bd82x6x/nvs.h>
#include <soc/nvs.h>
void mainboard_fill_gnvs(struct global_nvs *gnvs)
{

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@ -1,7 +1,7 @@
/* SPDX-License-Identifier: GPL-2.0-only */
#include <acpi/acpi_gnvs.h>
#include <southbridge/intel/bd82x6x/nvs.h>
#include <soc/nvs.h>
void mainboard_fill_gnvs(struct global_nvs *gnvs)
{

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@ -1,7 +1,7 @@
/* SPDX-License-Identifier: GPL-2.0-only */
#include <acpi/acpi_gnvs.h>
#include <southbridge/intel/bd82x6x/nvs.h>
#include <soc/nvs.h>
void mainboard_fill_gnvs(struct global_nvs *gnvs)
{

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@ -1,7 +1,7 @@
/* SPDX-License-Identifier: GPL-2.0-only */
#include <acpi/acpi_gnvs.h>
#include <southbridge/intel/bd82x6x/nvs.h>
#include <soc/nvs.h>
void mainboard_fill_gnvs(struct global_nvs *gnvs)
{

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@ -1,7 +1,7 @@
/* SPDX-License-Identifier: GPL-2.0-only */
#include <acpi/acpi_gnvs.h>
#include <southbridge/intel/lynxpoint/nvs.h>
#include <soc/nvs.h>
void mainboard_fill_gnvs(struct global_nvs *gnvs)
{

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@ -1,7 +1,7 @@
/* SPDX-License-Identifier: GPL-2.0-only */
#include <acpi/acpi_gnvs.h>
#include <southbridge/intel/bd82x6x/nvs.h>
#include <soc/nvs.h>
void mainboard_fill_gnvs(struct global_nvs *gnvs)
{

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@ -1,7 +1,7 @@
/* SPDX-License-Identifier: GPL-2.0-only */
#include <acpi/acpi_gnvs.h>
#include <southbridge/intel/bd82x6x/nvs.h>
#include <soc/nvs.h>
void mainboard_fill_gnvs(struct global_nvs *gnvs)
{

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@ -1,7 +1,7 @@
/* SPDX-License-Identifier: GPL-2.0-only */
#include <acpi/acpi_gnvs.h>
#include <southbridge/intel/i82801gx/nvs.h>
#include <soc/nvs.h>
void mainboard_fill_gnvs(struct global_nvs *gnvs)
{

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@ -5,7 +5,7 @@
#include <device/pci_def.h>
#include <console/console.h>
#include <cpu/x86/smm.h>
#include <southbridge/intel/i82801gx/nvs.h>
#include <soc/nvs.h>
#include <southbridge/intel/common/pmutil.h>
#include <ec/acpi/ec.h>
#include "dock.h"

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@ -1,7 +1,7 @@
/* SPDX-License-Identifier: GPL-2.0-only */
#include <acpi/acpi_gnvs.h>
#include <southbridge/intel/i82801gx/nvs.h>
#include <soc/nvs.h>
void mainboard_fill_gnvs(struct global_nvs *gnvs)
{

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@ -1,7 +1,7 @@
/* SPDX-License-Identifier: GPL-2.0-only */
#include <acpi/acpi_gnvs.h>
#include <southbridge/intel/bd82x6x/nvs.h>
#include <soc/nvs.h>
void mainboard_fill_gnvs(struct global_nvs *gnvs)
{

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@ -1,7 +1,7 @@
/* SPDX-License-Identifier: GPL-2.0-only */
#include <acpi/acpi_gnvs.h>
#include <southbridge/intel/bd82x6x/nvs.h>
#include <soc/nvs.h>
void mainboard_fill_gnvs(struct global_nvs *gnvs)
{

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@ -5,7 +5,7 @@
#include <acpi/acpi_gnvs.h>
#include <arch/smp/mpspec.h>
#include <device/device.h>
#include <southbridge/intel/i82801ix/nvs.h>
#include <soc/nvs.h>
void mainboard_fill_gnvs(struct global_nvs *gnvs)
{

View file

@ -1,7 +1,7 @@
/* SPDX-License-Identifier: GPL-2.0-only */
#include <acpi/acpi_gnvs.h>
#include <southbridge/intel/ibexpeak/nvs.h>
#include <soc/nvs.h>
void mainboard_fill_gnvs(struct global_nvs *gnvs)
{

View file

@ -3,7 +3,7 @@
#include <arch/io.h>
#include <console/console.h>
#include <cpu/x86/smm.h>
#include <southbridge/intel/ibexpeak/nvs.h>
#include <soc/nvs.h>
#include <southbridge/intel/common/pmutil.h>
#include <northbridge/intel/ironlake/ironlake.h>
#include <ec/acpi/ec.h>

View file

@ -1,7 +1,7 @@
/* SPDX-License-Identifier: GPL-2.0-only */
#include <acpi/acpi_gnvs.h>
#include <southbridge/intel/bd82x6x/nvs.h>
#include <soc/nvs.h>
void mainboard_fill_gnvs(struct global_nvs *gnvs)
{

View file

@ -1,7 +1,7 @@
/* SPDX-License-Identifier: GPL-2.0-only */
#include <acpi/acpi_gnvs.h>
#include <southbridge/intel/bd82x6x/nvs.h>
#include <soc/nvs.h>
void mainboard_fill_gnvs(struct global_nvs *gnvs)
{

View file

@ -1,7 +1,7 @@
/* SPDX-License-Identifier: GPL-2.0-only */
#include <acpi/acpi_gnvs.h>
#include <southbridge/intel/i82801gx/nvs.h>
#include <soc/nvs.h>
void mainboard_fill_gnvs(struct global_nvs *gnvs)
{

View file

@ -4,7 +4,7 @@
#include <device/pci_ops.h>
#include <console/console.h>
#include <cpu/x86/smm.h>
#include <southbridge/intel/i82801gx/nvs.h>
#include <soc/nvs.h>
#include <southbridge/intel/common/pmutil.h>
#include <ec/acpi/ec.h>
#include <option.h>

View file

@ -1,7 +1,7 @@
/* SPDX-License-Identifier: GPL-2.0-only */
#include <acpi/acpi_gnvs.h>
#include <southbridge/intel/bd82x6x/nvs.h>
#include <soc/nvs.h>
void mainboard_fill_gnvs(struct global_nvs *gnvs)
{

View file

@ -3,7 +3,7 @@
#include <console/console.h>
#include <cpu/x86/smm.h>
#include <device/pci_ops.h>
#include <southbridge/intel/ibexpeak/nvs.h>
#include <soc/nvs.h>
#include <southbridge/intel/common/pmutil.h>
#include <northbridge/intel/ironlake/ironlake.h>
#include <ec/acpi/ec.h>

View file

@ -1,7 +1,7 @@
/* SPDX-License-Identifier: GPL-2.0-only */
#include <acpi/acpi_gnvs.h>
#include <southbridge/intel/i82801gx/nvs.h>
#include <soc/nvs.h>
void mainboard_fill_gnvs(struct global_nvs *gnvs)
{

View file

@ -5,7 +5,7 @@
#include <acpi/acpi_gnvs.h>
#include <arch/smp/mpspec.h>
#include <device/device.h>
#include <southbridge/intel/i82801ix/nvs.h>
#include <soc/nvs.h>
void mainboard_fill_gnvs(struct global_nvs *gnvs)
{

View file

@ -2,7 +2,7 @@
#include <console/console.h>
#include <cpu/x86/smm.h>
#include <southbridge/intel/i82801ix/nvs.h>
#include <soc/nvs.h>
#include <southbridge/intel/i82801ix/i82801ix.h>
#include <ec/acpi/ec.h>

View file

@ -1,7 +1,7 @@
/* SPDX-License-Identifier: GPL-2.0-only */
#include <acpi/acpi_gnvs.h>
#include <southbridge/intel/bd82x6x/nvs.h>
#include <soc/nvs.h>
#include <variant/thermal.h>

View file

@ -4,7 +4,7 @@
#include <acpi/acpi_gnvs.h>
#include <device/device.h>
#include <ec/acpi/ec.h>
#include <southbridge/intel/bd82x6x/nvs.h>
#include <soc/nvs.h>
#include "thermal.h"

View file

@ -2,7 +2,7 @@
#include <console/console.h>
#include <cpu/x86/smm.h>
#include <southbridge/intel/bd82x6x/nvs.h>
#include <soc/nvs.h>
#include <southbridge/intel/bd82x6x/pch.h>
#include <southbridge/intel/bd82x6x/me.h>
#include <southbridge/intel/common/pmbase.h>

View file

@ -3,7 +3,7 @@
#include <acpi/acpi.h>
#include <acpi/acpi_gnvs.h>
#include <device/device.h>
#include <southbridge/intel/bd82x6x/nvs.h>
#include <soc/nvs.h>
#include "thermal.h"

View file

@ -3,7 +3,7 @@
#include <acpi/acpi.h>
#include <console/console.h>
#include <cpu/x86/smm.h>
#include <southbridge/intel/bd82x6x/nvs.h>
#include <soc/nvs.h>
#include <southbridge/intel/bd82x6x/pch.h>
#include <southbridge/intel/bd82x6x/me.h>
#include <northbridge/intel/sandybridge/sandybridge.h>

View file

@ -1,7 +1,7 @@
/* SPDX-License-Identifier: GPL-2.0-or-later */
#include <acpi/acpi_gnvs.h>
#include <southbridge/intel/bd82x6x/nvs.h>
#include <soc/nvs.h>
void mainboard_fill_gnvs(struct global_nvs *gnvs)
{

View file

@ -1,7 +1,7 @@
/* SPDX-License-Identifier: GPL-2.0-only */
#include <acpi/acpi_gnvs.h>
#include <southbridge/intel/bd82x6x/nvs.h>
#include <soc/nvs.h>
void mainboard_fill_gnvs(struct global_nvs *gnvs)
{

View file

@ -9,7 +9,6 @@ if SOC_AMD_CEZANNE
config SOC_SPECIFIC_OPTIONS
def_bool y
select ACPI_SOC_NVS
select ARCH_BOOTBLOCK_X86_32
select ARCH_VERSTAGE_X86_32
select ARCH_ROMSTAGE_X86_32

View file

@ -11,6 +11,7 @@ if SOUTHBRIDGE_INTEL_BD82X6X || SOUTHBRIDGE_INTEL_C216
config SOUTH_BRIDGE_OPTIONS # dummy
def_bool y
select ACPI_INTEL_HARDWARE_SLEEP_VALUES
select ACPI_SOC_NVS
select AZALIA_PLUGIN_SUPPORT
select SOUTHBRIDGE_INTEL_COMMON_FINALIZE
select SOUTHBRIDGE_INTEL_COMMON_RCBA_PIRQ

View file

@ -38,4 +38,6 @@ else
romstage-y += early_me_mrc.c early_usb_mrc.c
endif
CPPFLAGS_common += -I$(src)/southbridge/intel/bd82x6x/include
endif

View file

@ -18,13 +18,13 @@
#include <string.h>
#include "chip.h"
#include "pch.h"
#include "nvs.h"
#include <northbridge/intel/sandybridge/sandybridge.h>
#include <southbridge/intel/common/pciehp.h>
#include <southbridge/intel/common/acpi_pirq_gen.h>
#include <southbridge/intel/common/pmutil.h>
#include <southbridge/intel/common/rtc.h>
#include <southbridge/intel/common/spi.h>
#include <soc/nvs.h>
#define NMI_OFF 0
@ -641,16 +641,6 @@ static void pch_lpc_enable(struct device *dev)
pch_enable(dev);
}
size_t gnvs_size_of_array(void)
{
return sizeof(struct global_nvs);
}
void *gnvs_chromeos_ptr(struct global_nvs *gnvs)
{
return &gnvs->chromeos;
}
void soc_fill_gnvs(struct global_nvs *gnvs)
{
gnvs->apic = 1;

View file

@ -9,6 +9,7 @@
#include <cpu/x86/smm.h>
#include <cpu/intel/em64t101_save_state.h>
#include <northbridge/intel/sandybridge/sandybridge.h>
#include <soc/nvs.h>
#include <southbridge/intel/bd82x6x/me.h>
#include <southbridge/intel/common/gpio.h>
#include <cpu/intel/model_206ax/model_206ax.h>
@ -16,7 +17,6 @@
#include <southbridge/intel/common/finalize.h>
#include "pch.h"
#include "nvs.h"
int southbridge_io_trap_handler(int smif)
{

View file

@ -2,7 +2,6 @@
#include <console/console.h>
#include <acpi/acpi.h>
#include <acpi/acpi_gnvs.h>
#include <acpi/acpigen.h>
#include <device/device.h>
#include "i82371eb.h"
@ -45,8 +44,3 @@ unsigned long acpi_fill_mcfg(unsigned long current)
/* chipset doesn't have mmconfig */
return current;
}
size_t gnvs_size_of_array(void)
{
return 0;
}

View file

@ -2,7 +2,6 @@
#include <device/pci_ops.h>
#include <acpi/acpi.h>
#include <acpi/acpi_gnvs.h>
#include <version.h>
/* FIXME: This needs to go into a separate .h file
@ -80,8 +79,3 @@ void acpi_fill_fadt(acpi_fadt_t *fadt)
fadt->x_gpe0_blk.addrl = pmbase + 0x28;
fadt->x_gpe0_blk.addrh = 0x0;
}
size_t gnvs_size_of_array(void)
{
return 0;
}

View file

@ -3,6 +3,7 @@
config SOUTHBRIDGE_INTEL_I82801GX
bool
select ACPI_INTEL_HARDWARE_SLEEP_VALUES
select ACPI_SOC_NVS
select AZALIA_PLUGIN_SUPPORT
select IOAPIC
select USE_WATCHDOG_ON_BOOT

View file

@ -25,4 +25,6 @@ smm-y += smihandler.c
romstage-y += early_init.c
romstage-y += early_cir.c
CPPFLAGS_common += -I$(src)/southbridge/intel/i82801gx/include
endif

View file

@ -21,10 +21,10 @@
#include <southbridge/intel/common/hpet.h>
#include <southbridge/intel/common/pmbase.h>
#include <southbridge/intel/common/spi.h>
#include <soc/nvs.h>
#include "chip.h"
#include "i82801gx.h"
#include "nvs.h"
#define NMI_OFF 0
@ -464,11 +464,6 @@ static void lpc_final(struct device *dev)
outb(POST_OS_BOOT, 0x80);
}
size_t gnvs_size_of_array(void)
{
return sizeof(struct global_nvs);
}
void soc_fill_gnvs(struct global_nvs *gnvs)
{
gnvs->apic = 1;

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