Exynos 5250: Enable dynamic CBMEM
... In order to do this, the graphics memory has to move into the resource allocator and out of CBMEM. Change-Id: I7396da4a7068404b0d2e4d308becab4dd6ea59bb Signed-off-by: Stefan Reinauer <reinauer@google.com> Reviewed-on: https://gerrit.chromium.org/gerrit/59326 Reviewed-by: David Hendricks <dhendrix@chromium.org> Reviewed-on: http://review.coreboot.org/4390 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
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@ -3,6 +3,7 @@ config CPU_SAMSUNG_EXYNOS5250
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select HAVE_MONOTONIC_TIMER
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select HAVE_UART_SPECIAL
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select EARLY_CONSOLE
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select DYNAMIC_CBMEM
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bool
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default n
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@ -33,6 +33,7 @@ romstage-y += gpio.c
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romstage-y += timer.c
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romstage-y += i2c.c
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#romstage-y += wdt.c
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romstage-y += cbmem.c
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ramstage-y += spi.c
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ramstage-y += clock.c
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@ -50,6 +51,7 @@ ramstage-y += i2c.c
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ramstage-y += dp-reg.c
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ramstage-y += fb.c
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ramstage-y += usb.c
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ramstage-y += cbmem.c
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exynos5250_add_bl1: $(obj)/coreboot.pre
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printf " DD Adding Samsung Exynos5250 BL1\n"
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@ -0,0 +1,28 @@
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/*
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* This file is part of the coreboot project.
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*
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* Copyright 2013 Google Inc.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; version 2 of the License.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
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*/
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#include <stddef.h>
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#include <cbmem.h>
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#include "cpu.h"
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void *cbmem_top(void)
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{
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return (void *)(get_fb_base_kb() * KiB);
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}
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@ -32,9 +32,6 @@
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#include "usb.h"
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#include "chip.h"
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#define RAM_BASE_KB (CONFIG_SYS_SDRAM_BASE >> 10)
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#define RAM_SIZE_KB (CONFIG_DRAM_SIZE_MB << 10UL)
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static unsigned int cpu_id;
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static unsigned int cpu_rev;
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@ -62,7 +59,8 @@ static void set_cpu_id(void)
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* involving lots of machine and callbacks, is hard to debug and
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* verify.
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*/
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static void exynos_displayport_init(device_t dev)
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static void exynos_displayport_init(device_t dev, u32 lcdbase,
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unsigned long fb_size)
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{
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int ret;
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struct cpu_samsung_exynos5250_config *conf = dev->chip_info;
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@ -70,9 +68,6 @@ static void exynos_displayport_init(device_t dev)
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* this code to a pre-ram stage, it will be much easier.
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*/
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struct exynos5_fimd_panel panel;
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unsigned long int fb_size;
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u32 lcdbase;
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memset(&panel, 0, sizeof(panel));
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panel.is_dp = 1; /* Display I/F is eDP */
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@ -93,11 +88,7 @@ static void exynos_displayport_init(device_t dev)
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panel.xres = conf->xres;
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panel.yres = conf->yres;
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/* The size is a magic number from hardware. */
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fb_size = conf->xres * conf->yres * (conf->bpp / 8);
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lcdbase = (uintptr_t)cbmem_add(CBMEM_ID_CONSOLE, fb_size);
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printk(BIOS_SPEW, "LCD framebuffer base is %p\n", (void *)(lcdbase));
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printk(BIOS_SPEW, "LCD framebuffer @%p\n", (void *)(lcdbase));
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memset((void *)lcdbase, 0, fb_size); /* clear the framebuffer */
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/*
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@ -111,23 +102,26 @@ static void exynos_displayport_init(device_t dev)
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*/
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uint32_t lower = ALIGN_DOWN(lcdbase, MiB);
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uint32_t upper = ALIGN_UP(lcdbase + fb_size, MiB);
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dcache_clean_invalidate_by_mva(lower, upper - lower);
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mmu_config_range(lower/MiB, (upper - lower)/MiB, DCACHE_OFF);
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mmio_resource(dev, 1, lcdbase/KiB, (fb_size + KiB - 1)/KiB);
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printk(BIOS_DEBUG,
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"Initializing Exynos VGA, base %p\n", (void *)lcdbase);
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dcache_clean_invalidate_by_mva(lower, upper - lower);
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mmu_config_range(lower / MiB, (upper - lower) / MiB, DCACHE_OFF);
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printk(BIOS_DEBUG, "Initializing Exynos LCD.\n");
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ret = lcd_ctrl_init(fb_size, &panel, (void *)lcdbase);
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}
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static void cpu_enable(device_t dev)
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{
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exynos_displayport_init(dev);
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unsigned long fb_size = FB_SIZE_KB * KiB;
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u32 lcdbase = get_fb_base_kb() * KiB;
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ram_resource(dev, 0, RAM_BASE_KB, RAM_SIZE_KB);
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ram_resource(dev, 0, RAM_BASE_KB, RAM_SIZE_KB - FB_SIZE_KB);
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mmio_resource(dev, 1, lcdbase / KiB, (fb_size + KiB - 1) / KiB);
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exynos_displayport_init(dev, lcdbase, fb_size);
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set_cpu_id();
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}
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static void cpu_init(device_t dev)
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@ -125,4 +125,14 @@ void exynos5250_config_l2_cache(void);
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extern struct tmu_info exynos5250_tmu_info;
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/* TODO clean up defines. */
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#define FB_SIZE_KB 4096
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#define RAM_BASE_KB (CONFIG_SYS_SDRAM_BASE >> 10)
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#define RAM_SIZE_KB (CONFIG_DRAM_SIZE_MB << 10UL)
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static inline u32 get_fb_base_kb(void)
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{
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return RAM_BASE_KB + RAM_SIZE_KB - FB_SIZE_KB;
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}
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#endif /* _EXYNOS5250_CPU_H */
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@ -213,7 +213,7 @@ static void mainboard_init(device_t dev)
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.base = (struct exynos5_dp *)EXYNOS5250_DP1_BASE,
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.video_info = &dp_video_info,
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};
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void *fb_addr;
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void *fb_addr = (void *)(get_fb_base_kb() * KiB);
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gpio_init();
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@ -228,7 +228,6 @@ static void mainboard_init(device_t dev)
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/* Disable USB3.0 PLL to save 250mW of power */
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disable_usb30_pll();
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fb_addr = cbmem_find(CBMEM_ID_CONSOLE);
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set_vbe_mode_info_valid(&edid, (uintptr_t)fb_addr);
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lcd_vdd();
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@ -265,6 +264,7 @@ static void mainboard_init(device_t dev)
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// gpio_info();
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}
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#if !CONFIG_DYNAMIC_CBMEM
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void get_cbmem_table(uint64_t *base, uint64_t *size)
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{
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*size = CONFIG_COREBOOT_TABLES_SIZE;
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@ -272,13 +272,16 @@ void get_cbmem_table(uint64_t *base, uint64_t *size)
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((unsigned)CONFIG_DRAM_SIZE_MB << 20ULL) -
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CONFIG_COREBOOT_TABLES_SIZE;
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}
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#endif
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static void mainboard_enable(device_t dev)
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{
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dev->ops->init = &mainboard_init;
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#if !CONFIG_DYNAMIC_CBMEM
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/* set up coreboot tables */
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cbmem_initialize();
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#endif
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/* set up dcache and MMU */
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/* FIXME: this should happen via resource allocator */
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@ -21,6 +21,7 @@
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#include <armv7.h>
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#include <cbfs.h>
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#include <cbmem.h>
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#include <arch/cache.h>
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#include <cpu/samsung/exynos5250/i2c.h>
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@ -189,6 +190,8 @@ void main(void)
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/* Set SPI (primary CBFS media) clock to 50MHz. */
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clock_set_rate(PERIPH_ID_SPI1, 50000000);
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cbmem_initialize_empty();
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entry = cbfs_load_stage(CBFS_DEFAULT_MEDIA, "fallback/coreboot_ram");
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stage_exit(entry);
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}
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