lenovo/g505s: Switch away from AGESA_LEGACY_WRAPPER

Change-Id: Ia65f9ecb62767424744e399a43e4728666fd28b3
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/20716
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Martin Roth <martinroth@google.com>
This commit is contained in:
Kyösti Mälkki 2017-03-04 07:34:02 +02:00
parent 1b526621c9
commit 662cf7f8a6
4 changed files with 34 additions and 59 deletions

View File

@ -15,14 +15,13 @@
#include "AGESA.h"
#include <northbridge/amd/agesa/BiosCallOuts.h>
#include <northbridge/amd/agesa/state_machine.h>
#include <cbfs.h>
#include <southbridge/amd/agesa/hudson/imc.h>
#include <vendorcode/amd/agesa/f15tn/Proc/Fch/FchPlatform.h>
#include <stdlib.h>
static AGESA_STATUS Fch_Oem_config(UINT32 Func, UINTN FchData, VOID *ConfigPtr);
const BIOS_CALLOUT_STRUCT BiosCallouts[] =
{
{AGESA_DO_RESET, agesa_Reset },
@ -32,7 +31,6 @@ const BIOS_CALLOUT_STRUCT BiosCallouts[] =
{AGESA_GET_IDS_INIT_DATA, agesa_EmptyIdsInitData },
{AGESA_HOOKBEFORE_DQS_TRAINING, agesa_NoopSuccess },
{AGESA_HOOKBEFORE_EXIT_SELF_REF, agesa_NoopSuccess },
{AGESA_FCH_OEM_CALLOUT, Fch_Oem_config },
{AGESA_GNB_GFX_GET_VBIOS_IMAGE, agesa_GfxGetVbiosImage }
};
const int BiosCalloutsLen = ARRAY_SIZE(BiosCallouts);
@ -171,41 +169,16 @@ static void oem_fan_control(FCH_DATA_BLOCK *FchParams)
}
}
/**
* Fch Oem setting callback
*
* Configure platform specific Hudson device,
* such Azalia, SATA, IMC etc.
*/
static AGESA_STATUS Fch_Oem_config(UINT32 Func, UINTN FchData, VOID *ConfigPtr)
void board_FCH_InitReset(struct sysinfo *cb_NA, FCH_RESET_DATA_BLOCK *FchParams_reset)
{
AMD_CONFIG_PARAMS *StdHeader = ConfigPtr;
if (StdHeader->Func == AMD_INIT_RESET) {
FCH_RESET_DATA_BLOCK *FchParams_reset = (FCH_RESET_DATA_BLOCK *)FchData;
printk(BIOS_DEBUG, "Fch OEM config in INIT RESET ");
//FchParams_reset->EcChannel0 = TRUE; /* logical devicd 3 */
FchParams_reset->LegacyFree = IS_ENABLED(CONFIG_HUDSON_LEGACY_FREE);
FchParams_reset->FchReset.Xhci0Enable = IS_ENABLED(CONFIG_HUDSON_XHCI_ENABLE);
FchParams_reset->FchReset.Xhci1Enable = FALSE;
} else if (StdHeader->Func == AMD_INIT_ENV) {
FCH_DATA_BLOCK *FchParams_env = (FCH_DATA_BLOCK *)FchData;
printk(BIOS_DEBUG, "Fch OEM config in INIT ENV ");
}
void board_FCH_InitEnv(struct sysinfo *cb_NA, FCH_DATA_BLOCK *FchParams_env)
{
/* Azalia Controller OEM Codec Table Pointer */
FchParams_env->Azalia.AzaliaOemCodecTablePtr = (CODEC_TBL_LIST *)(&CodecTableList[0]);
/* Azalia Controller Front Panel OEM Table Pointer */
/* Fan Control */
oem_fan_control(FchParams_env);
/* XHCI configuration */
FchParams_env->Usb.Xhci0Enable = IS_ENABLED(CONFIG_HUDSON_XHCI_ENABLE);
FchParams_env->Usb.Xhci1Enable = FALSE;
/* sata configuration */
}
printk(BIOS_DEBUG, "Done\n");
return AGESA_SUCCESS;
}

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@ -18,7 +18,6 @@ if BOARD_LENOVO_G505S
config BOARD_SPECIFIC_OPTIONS # dummy
def_bool y
select SYSTEM_TYPE_LAPTOP
select AGESA_LEGACY_WRAPPER
select CPU_AMD_AGESA_FAMILY15_TN
select NORTHBRIDGE_AMD_AGESA_FAMILY15_TN
select SOUTHBRIDGE_AMD_AGESA_HUDSON

View File

@ -17,7 +17,7 @@
#include "AGESA.h"
#include "amdlib.h"
#include <northbridge/amd/agesa/agesawrapper.h>
#include <northbridge/amd/agesa/state_machine.h>
#include <vendorcode/amd/agesa/f15tn/Proc/CPU/heapManager.h>
#include <PlatformMemoryConfiguration.h>
@ -140,6 +140,13 @@ static const PCIe_DDI_DESCRIPTOR DdiList [] = {
},
};
void board_BeforeInitReset(struct sysinfo *cb, AMD_RESET_PARAMS *Reset)
{
FCH_RESET_INTERFACE *FchReset = &Reset->FchInterface;
FchReset->Xhci0Enable = IS_ENABLED(CONFIG_HUDSON_XHCI_ENABLE);
FchReset->Xhci1Enable = FALSE;
}
/*---------------------------------------------------------------------------------------*/
/**
* OemCustomizeInitEarly
@ -156,7 +163,7 @@ static const PCIe_DDI_DESCRIPTOR DdiList [] = {
**/
/*---------------------------------------------------------------------------------------*/
static AGESA_STATUS OemInitEarly(AMD_EARLY_PARAMS * InitEarly)
void board_BeforeInitEarly(struct sysinfo *cb, AMD_EARLY_PARAMS *InitEarly)
{
AGESA_STATUS Status;
PCIe_COMPLEX_DESCRIPTOR *PcieComplexListPtr;
@ -188,14 +195,6 @@ static AGESA_STATUS OemInitEarly(AMD_EARLY_PARAMS * InitEarly)
PcieComplexListPtr->DdiLinkList = DdiList;
InitEarly->GnbConfig.PcieComplexList = PcieComplexListPtr;
return AGESA_SUCCESS;
}
static AGESA_STATUS OemInitMid(AMD_MID_PARAMS * InitMid)
{
/* 0 iGpuVgaAdapter, 1 iGpuVgaNonAdapter; */
InitMid->GnbMidConfiguration.iGpuVgaMode = 0;
return AGESA_SUCCESS;
}
/*----------------------------------------------------------------------------------------
@ -210,7 +209,7 @@ static AGESA_STATUS OemInitMid(AMD_MID_PARAMS * InitMid)
* If PlatformSpecificTable is populated, AGESA will base its settings on the
* data from the table. Otherwise, it will use its default conservative settings
*/
CONST PSO_ENTRY ROMDATA DefaultPlatformMemoryConfiguration[] = {
static CONST PSO_ENTRY ROMDATA PlatformMemoryTable[] = {
NUMBER_OF_DIMMS_SUPPORTED (ANY_SOCKET, ANY_CHANNEL, 1),
NUMBER_OF_CHANNELS_SUPPORTED (ANY_SOCKET, 2),
@ -222,7 +221,13 @@ CONST PSO_ENTRY ROMDATA DefaultPlatformMemoryConfiguration[] = {
PSO_END
};
const struct OEM_HOOK OemCustomize = {
.InitEarly = OemInitEarly,
.InitMid = OemInitMid,
};
void board_BeforeInitPost(struct sysinfo *cb, AMD_POST_PARAMS *InitPost)
{
InitPost->MemConfig.PlatformMemoryConfiguration = (PSO_ENTRY *)PlatformMemoryTable;
}
void board_BeforeInitMid(struct sysinfo *cb, AMD_MID_PARAMS *InitMid)
{
/* 0 iGpuVgaAdapter, 1 iGpuVgaNonAdapter; */
InitMid->GnbMidConfiguration.iGpuVgaMode = 0;
}

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@ -13,7 +13,7 @@
* GNU General Public License for more details.
*/
#include <northbridge/amd/agesa/agesawrapper.h>
#include <northbridge/amd/agesa/state_machine.h>
#include <northbridge/amd/agesa/BiosCallOuts.h>
#include "ec.h"
@ -43,9 +43,7 @@ static void mainboard_enable(device_t dev)
hudson_configure_gevent_smi(EC_SMI_GEVENT, SMI_MODE_SMI, SMI_LVL_HIGH);
hudson_enable_smi_generation();
if (acpi_is_wakeup_s3())
agesawrapper_fchs3earlyrestore();
else
if (!acpi_is_wakeup_s3())
pavilion_cold_boot_init();
}