soc/amd/common/block/lpc/lpc: report mapped SPI flash as MMIO range

Since the 16MByte of memory-mapped SPI flash region right below the 4GB
boundary is both a fixed region and isn't decoded on a device below the
LPC device, but assumed to be decoded by the LPC device itself, it
shouldn't be reported as a subtractive resource, but as an MMIO resource
instead.

TEST=On mandolin the 16MByte MMIO-mapped SPI flash now show up as a
reserved region in the e820 memory map which wasn't the case before:

13. 00000000ff000000-00000000ffffffff: RESERVED

The Linux kernel doesn't show any new or possibly related errors.

Signed-off-by: Felix Held <felix-coreboot@felixheld.de>
Suggested-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Change-Id: Ib52df2b2d79a1e6213c3499984a5a1e0e25c058a
Reviewed-on: https://review.coreboot.org/c/coreboot/+/74839
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Matt DeVillier <matt.devillier@amd.corp-partner.google.com>
Reviewed-by: Martin L Roth <gaumless@gmail.com>
Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-by: Eric Lai <eric_lai@quanta.corp-partner.google.com>
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
This commit is contained in:
Felix Held 2023-04-28 17:30:59 +02:00 committed by Matt DeVillier
parent 22b226724e
commit 662d7af70b
1 changed files with 2 additions and 5 deletions

View File

@ -117,11 +117,8 @@ static void lpc_read_resources(struct device *dev)
IORESOURCE_ASSIGNED | IORESOURCE_FIXED;
/* Only up to 16 MByte of the SPI flash can be mapped right below 4 GB */
res = new_resource(dev, IOINDEX_SUBTRACTIVE(1, 0));
res->base = FLASH_BELOW_4GB_MAPPING_REGION_BASE;
res->size = FLASH_BELOW_4GB_MAPPING_REGION_SIZE;
res->flags = IORESOURCE_MEM | IORESOURCE_SUBTRACTIVE |
IORESOURCE_ASSIGNED | IORESOURCE_FIXED;
mmio_range(dev, 1, FLASH_BELOW_4GB_MAPPING_REGION_BASE,
FLASH_BELOW_4GB_MAPPING_REGION_SIZE);
/* Add a memory resource for the SPI BAR. */
mmio_range(dev, 2, SPI_BASE_ADDRESS, 1 * KiB);