diff --git a/src/mainboard/intel/kblrvp/variants/rvp11/include/variant/gpio.h b/src/mainboard/intel/kblrvp/variants/rvp11/include/variant/gpio.h
index 354a4ff157..fe8c2e210c 100644
--- a/src/mainboard/intel/kblrvp/variants/rvp11/include/variant/gpio.h
+++ b/src/mainboard/intel/kblrvp/variants/rvp11/include/variant/gpio.h
@@ -24,12 +24,6 @@
 /* BIOS Flash Write Protect */
 #define GPIO_PCH_WP		GPP_C23
 
-/* Memory configuration board straps */
-#define GPIO_MEM_CONFIG_0	GPP_C12
-#define GPIO_MEM_CONFIG_1	GPP_C13
-#define GPIO_MEM_CONFIG_2	GPP_C14
-#define GPIO_MEM_CONFIG_3	GPP_C15
-
 /* EC wake is LAN_WAKE# which is a special DeepSX wake pin */
 #define GPE_EC_WAKE		GPE0_LAN_WAK
 
diff --git a/src/mainboard/intel/saddlebrook/gpio.h b/src/mainboard/intel/saddlebrook/gpio.h
index a574ac589d..f60515b8ec 100644
--- a/src/mainboard/intel/saddlebrook/gpio.h
+++ b/src/mainboard/intel/saddlebrook/gpio.h
@@ -12,12 +12,6 @@
 /* BIOS Flash Write Protect */
 #define GPIO_PCH_WP		GPP_C23
 
-/* Memory configuration board straps */
-#define GPIO_MEM_CONFIG_0	GPP_C12
-#define GPIO_MEM_CONFIG_1	GPP_C13
-#define GPIO_MEM_CONFIG_2	GPP_C14
-#define GPIO_MEM_CONFIG_3	GPP_C15
-
 /* EC wake is LAN_WAKE# which is a special DeepSX wake pin */
 #define GPE_EC_WAKE		GPE0_LAN_WAK