From 664c58ab95ff201bc986f96507de021d772bef74 Mon Sep 17 00:00:00 2001 From: Tim Wawrzynczak Date: Tue, 29 Jun 2021 11:32:38 -0600 Subject: [PATCH] soc/intel/cannonlake: Add some missing DEVFN macros BUG=b:130217151 Signed-off-by: Tim Wawrzynczak Change-Id: If535ad0bdd46d3315493155e64968d305aa34799 Reviewed-on: https://review.coreboot.org/c/coreboot/+/55967 Reviewed-by: Furquan Shaikh Reviewed-by: Nick Vaccaro Tested-by: build bot (Jenkins) --- src/soc/intel/cannonlake/include/soc/pci_devs.h | 12 ++++++++++++ 1 file changed, 12 insertions(+) diff --git a/src/soc/intel/cannonlake/include/soc/pci_devs.h b/src/soc/intel/cannonlake/include/soc/pci_devs.h index c9c51ca87e..a92b478a79 100644 --- a/src/soc/intel/cannonlake/include/soc/pci_devs.h +++ b/src/soc/intel/cannonlake/include/soc/pci_devs.h @@ -22,6 +22,14 @@ #define SA_DEV_ROOT PCI_DEV(0, SA_DEV_SLOT_ROOT, 0) #endif +#define SA_DEV_SLOT_PEG 0x01 +#define SA_DEVFN_PEG0 PCI_DEVFN(SA_DEV_SLOT_PEG, 0) +#define SA_DEVFN_PEG1 PCI_DEVFN(SA_DEV_SLOT_PEG, 1) +#define SA_DEVFN_PEG2 PCI_DEVFN(SA_DEV_SLOT_PEG, 2) +#define SA_DEV_PEG0 PCI_DEV(0, SA_DEV_SLOT_PEG, 0) +#define SA_DEV_PEG1 PCI_DEV(0, SA_DEV_SLOT_PEG, 1) +#define SA_DEV_PEG2 PCI_DEV(0, SA_DEV_SLOT_PEG, 2) + #define SA_DEV_SLOT_IGD 0x02 #define SA_DEVFN_IGD PCI_DEVFN(SA_DEV_SLOT_IGD, 0) #define SA_DEV_IGD PCI_DEV(0, SA_DEV_SLOT_IGD, 0) @@ -34,6 +42,10 @@ #define SA_DEVFN_IPU PCI_DEVFN(SA_DEV_SLOT_IPU, 0) #define SA_DEV_IPU PCI_DEV(0, SA_DEV_SLOT_IPU, 0) +#define SA_DEV_SLOT_GNA 0x08 +#define SA_DEVFN_GNA PCI_DEVFN(SA_DEV_SLOT_GNA, 0) +#define SA_DEV_GNA PCI_DEV(0, SA_DEV_SLOT_GNA, 0) + /* PCH Devices */ #define PCH_DEV_SLOT_THERMAL 0x12 #define PCH_DEVFN_THERMAL _PCH_DEVFN(THERMAL, 0)