sb/intel/bd82x6x/sata: Don't hard-code values
The interrupt line registers are configured in a central place, pch_pirq_init() in `lpc.c`, according to the PIRQ configuration. Hardcoding values here makes no sense. Change-Id: Ide5f101b2e5bda84f3c2ff8c8ca636b8233bb948 Signed-off-by: Felix Singer <felix.singer@secunet.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/40229 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Patrick Rudolph <siro@das-labor.org> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
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@ -167,7 +167,6 @@ void early_usb_init(const struct southbridge_usb_port *portmap);
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#define PCH_IDE_DEV PCI_DEV(0, 0x1f, 1)
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#define PCH_SATA_DEV PCI_DEV(0, 0x1f, 2)
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#define PCH_SATA2_DEV PCI_DEV(0, 0x1f, 5)
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#define INTR_LN 0x3c
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#define IDE_TIM_PRI 0x40 /* IDE timings, primary */
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#define IDE_DECODE_ENABLE (1 << 15)
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#define IDE_SITRE (1 << 14)
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@ -58,10 +58,6 @@ static void sata_init(struct device *dev)
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printk(BIOS_DEBUG, "SATA: Controller in AHCI mode.\n");
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/* Set Interrupt Line */
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/* Interrupt Pin is set by D31IP.PIP */
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pci_write_config8(dev, INTR_LN, 0x0a);
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/* Set timings */
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pci_write_config16(dev, IDE_TIM_PRI, IDE_DECODE_ENABLE |
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IDE_ISP_3_CLOCKS | IDE_RCT_1_CLOCKS |
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@ -131,10 +127,6 @@ static void sata_init(struct device *dev)
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*/
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pci_write_config8(dev, 0x09, 0x8f);
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/* Set Interrupt Line */
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/* Interrupt Pin is set by D31IP.PIP */
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pci_write_config8(dev, INTR_LN, 0xff);
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/* Set timings */
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pci_write_config16(dev, IDE_TIM_PRI, IDE_DECODE_ENABLE |
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IDE_ISP_3_CLOCKS | IDE_RCT_1_CLOCKS |
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