qcs405: util/qualcomm: Add T32 debug scripts
Add T32 scripts that allow debug of any coreboot stage on qcs405. Change-Id: I4e792a2806e5ebd3b4075c7bb69c43587920deae Signed-off-by: Sricharan R <sricharan@codeaurora.org> Signed-off-by: Nitheesh Sekar <nsekar@codeaurora.org> Reviewed-on: https://review.coreboot.org/c/coreboot/+/29951 Reviewed-by: Patrick Georgi <pgeorgi@google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Nitheesh Sekar
Patrick Georgi
parent
f7f90f7c3f
commit
6681f05373
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@ -0,0 +1,16 @@
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d.a 0x80000000 mov x0,#0x8c
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d.a 0x80000004 lsl x0, x0, #0x14
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d.a 0x80000008 mov x1,#0x18
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d.a 0x8000000c lsl x1,x1, #0x10
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d.a 0x80000010 mov x2,#0x0
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d.a 0x80000014 mov x3,#0x80
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d.a 0x80000018 lsl x3, x3, #0x18
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d.a 0x8000001c add x3, x3, #0x14
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d.a 0x80000020 str x2,[x0]
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d.a 0x80000024 sub x1, x1, #0x8
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d.a 0x80000028 add x0, x0, #0x8
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d.a 0x8000002c cmp x1,0x0
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d.a 0x80000030 b.ne 0x20
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d.a 0x80000034 b 0x34
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r.s pc 0x80000000
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go
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@ -0,0 +1,165 @@
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;============================================================================
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;##
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;## This file is part of the coreboot project.
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;##
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;## Copyright (C) 2018, The Linux Foundation. All rights reserved.
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;##
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;## This program is free software; you can redistribute it and/or modify
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;## it under the terms of the GNU General Public License version 2 and
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;## only version 2 as published by the Free Software Foundation.
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;##
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;## This program is distributed in the hope that it will be useful,
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;## but WITHOUT ANY WARRANTY; without even the implied warranty of
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;## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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;## GNU General Public License for more details.
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;##
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;============================================================================
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; Name:
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; debug_cb_405.cmm
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;
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; Description:
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; Debug coreboot 405 front-end
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;============================================================================
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;============================================================================
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; CMM script variables
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;============================================================================
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LOCAL &TargetPkg
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GLOBAL &BBEntryAddr // Bootblock Entry
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GLOBAL &BBExitAddr // Bootblock Exit to Xbl-Sec
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GLOBAL &VEREntryAddr // Verstage Entry
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GLOBAL &ROMEntryAddr // Romstage Entry
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GLOBAL &QCLEntryAddr // QCLstage Entry
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GLOBAL &RAMEntryAddr // Ramstage Entry
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GLOBAL &BL31EntryAddr // BL31 Entry
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GLOBAL &DCEntryAddr // Depthcharge Entry
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GLOBAL &KernelEntryAddr // Kernel Entry
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GLOBAL &PreRamConsoleAddr
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GLOBAL &RamConsoleAddr
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GLOBAL &PreRamCbfsCache
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GLOBAL &VBoot2Work
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GLOBAL &Stack
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GLOBAL &Ttb
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GLOBAL &Timestamp
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GLOBAL &CbmemTop
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GLOBAL &PostRamCbfsCache
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GLOBAL &CBTablePtr
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GLOBAL &debug
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;============================================================================
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;---------------------------------------------------
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; Entry point
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;---------------------------------------------------
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ENTRY &ImageName
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// Later these can be parameterized
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&TargetPkg="Qcs405Pkg"
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// These settings come from .../src/soc/qualcomm/qcs405/include/soc/memlayout.ld
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&BBEntryAddr=0x8c2f000
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&VEREntryAddr=0x8C00000
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&ROMEntryAddr=0x8C00000
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&QCLEntryAddr=0x1485AC00
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&RAMEntryAddr=0x9F860000
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&BL31EntryAddr=0x06820000
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&DCEntryAddr=0xf1104800
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&KernelEntryAddr=0x90080000
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&PreRamConsoleAddr=0x8C4F400
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&VBoot2Work=0x8C47000
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&Stack=0x8C4B000
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&Ttb=0x8C39000
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&Timestamp=0x8C4F000
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&PreRamCbfsCache=0x8C57400
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&CbmemTop=0x280000000
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&PostRamCbfsCache=0x9F800000
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// End of memlayout.ld settings
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// Common commands irrespective of &Mode
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PATH
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&CwDir=os.pwd()
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PATH + &CwDir
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// position at top of coreboot tree
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// find depth count for source loading
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cd ..\..\..\..
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&srcpath=os.pwd()
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b.sel PROGRAM onchip
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;sys.u
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b.d /all
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;go &BBEntryAddr
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;wait !run()
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;---------------------------------------------------
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; Setup area and log
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;---------------------------------------------------
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area.clear
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area.reset
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area.create CB_Logs 1000. 8192.
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area.select CB_Logs
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;winclear
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;b.d /all
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if FILE.EXIST("C:\TEMP\WIN.CMM")
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do C:\TEMP\WIN.CMM
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area.view CB_Logs
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PRINT %String "Source Path: &srcpath"
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symbol.sourcepath.setbasedir &srcpath\src
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PRINT "pbl32_to_bootblock64 jump"
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do pbl32_to_bootblock64_jump.cmm
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do clear_bss.cmm
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WAIT 5s
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b
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// Make parsing simple, upper-case parameters
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&Imagename=STRING.UPR("&Imagename")
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IF (STR.CP("&ImageName","DEBUG,*"))
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(
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&debug="DEBUG"
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)
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ELSE
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(
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&debug=""
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)
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&Imagename=STR.CUT("&ImageName",6)
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IF "&debug"==""
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(
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PRINT "SPI_RAM LOAD"
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&ImageName=STRING.UPR("&ImageName")
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IF "&ImageName"==""
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(
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&ImageName="RAM,BB" //for RAM load Bootblock only and jump till DC
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)
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PRINT "&ImageName"
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)
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ELSE
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(
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if (STR.CP("&debug","DEBUG"))
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(
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PRINT "DEBUG"
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&ImageName=STRING.UPR("&ImageName")
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IF "&ImageName"==""
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(
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&ImageName="RAM,ALL" //for RAM loading all the images
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)
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PRINT "&ImageName"
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)
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)
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DO debug_cb_common.cmm &TargetPkg &srcpath &xblsrcpath &ImageName
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enddo
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@ -104,6 +104,10 @@ ENTRY &TargetPkg &srcpath &xblsrcpath &ImageName
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if &BBStage
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(
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IF "&debug"==""
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(
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d.load.binary build/coreboot.rom 0xA0000000
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)
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&imgpath="build\cbfs\fallback\bootblock.elf"
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if (&RAMLoad)
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d.load.elf &imgpath /strippart "coreboot" /sourcepath &srcpath
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@ -114,9 +118,17 @@ ENTRY &TargetPkg &srcpath &xblsrcpath &ImageName
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;b.s run_romstage /o
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;d.set &PreRamConsoleAddr++0x8000 0
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d.dump &PreRamConsoleAddr /spotlight
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print %String "Now the control is in BootBlock, press enter after debugging to go to next stage"
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print %String "Press enter to go to next stage"
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enter
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IF (STR.CP("&debug","DEBUG"))
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(
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print %String "Now the control is in BootBlock, press enter after debugging to go to next stage"
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print %String "Press enter to go to next stage"
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enter
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)
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ELSE
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(
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go
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enddo
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)
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)
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go &VEREntryAddr
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@ -0,0 +1,15 @@
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PER.Set.simple SPR:0x36100 %Long 00c5183C
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D.S AZSD:0x8600034 %LE %Long 0x8600000
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D.S AZSD:0x8600000 %LE %Long 0x1400000
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d.a 0x8600004 ldr r0,0x8600034
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d.a 0x8600008 mcr p15,0x0,r0,c12,c0,1
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d.a 0x860000c dsb
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d.a 0x8600010 isb
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d.a 0x8600014 mrc p15,0x0,r1,c12,c0,2
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d.a 0x8600018 orr r1,r1,0x3
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d.a 0x860001c mcr p15,0x0,r1,c12,c0,2
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d.a 0x8600020 isb
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d.a 0x8600024 wfi
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r.s pc 0x8600004
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go
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b
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