qcs405: util/qualcomm: Add T32 debug scripts

Add T32 scripts that allow debug of any coreboot stage
on qcs405.

Change-Id: I4e792a2806e5ebd3b4075c7bb69c43587920deae
Signed-off-by: Sricharan R <sricharan@codeaurora.org>
Signed-off-by: Nitheesh Sekar <nsekar@codeaurora.org>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/29951
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Nitheesh Sekar 2018-09-14 19:07:36 +05:30 committed by Patrick Georgi
parent f7f90f7c3f
commit 6681f05373
4 changed files with 211 additions and 3 deletions

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@ -0,0 +1,16 @@
d.a 0x80000000 mov x0,#0x8c
d.a 0x80000004 lsl x0, x0, #0x14
d.a 0x80000008 mov x1,#0x18
d.a 0x8000000c lsl x1,x1, #0x10
d.a 0x80000010 mov x2,#0x0
d.a 0x80000014 mov x3,#0x80
d.a 0x80000018 lsl x3, x3, #0x18
d.a 0x8000001c add x3, x3, #0x14
d.a 0x80000020 str x2,[x0]
d.a 0x80000024 sub x1, x1, #0x8
d.a 0x80000028 add x0, x0, #0x8
d.a 0x8000002c cmp x1,0x0
d.a 0x80000030 b.ne 0x20
d.a 0x80000034 b 0x34
r.s pc 0x80000000
go

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@ -0,0 +1,165 @@
;============================================================================
;##
;## This file is part of the coreboot project.
;##
;## Copyright (C) 2018, The Linux Foundation. All rights reserved.
;##
;## This program is free software; you can redistribute it and/or modify
;## it under the terms of the GNU General Public License version 2 and
;## only version 2 as published by the Free Software Foundation.
;##
;## This program is distributed in the hope that it will be useful,
;## but WITHOUT ANY WARRANTY; without even the implied warranty of
;## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
;## GNU General Public License for more details.
;##
;============================================================================
; Name:
; debug_cb_405.cmm
;
; Description:
; Debug coreboot 405 front-end
;============================================================================
;============================================================================
; CMM script variables
;============================================================================
LOCAL &TargetPkg
GLOBAL &BBEntryAddr // Bootblock Entry
GLOBAL &BBExitAddr // Bootblock Exit to Xbl-Sec
GLOBAL &VEREntryAddr // Verstage Entry
GLOBAL &ROMEntryAddr // Romstage Entry
GLOBAL &QCLEntryAddr // QCLstage Entry
GLOBAL &RAMEntryAddr // Ramstage Entry
GLOBAL &BL31EntryAddr // BL31 Entry
GLOBAL &DCEntryAddr // Depthcharge Entry
GLOBAL &KernelEntryAddr // Kernel Entry
GLOBAL &PreRamConsoleAddr
GLOBAL &RamConsoleAddr
GLOBAL &PreRamCbfsCache
GLOBAL &VBoot2Work
GLOBAL &Stack
GLOBAL &Ttb
GLOBAL &Timestamp
GLOBAL &CbmemTop
GLOBAL &PostRamCbfsCache
GLOBAL &CBTablePtr
GLOBAL &debug
;============================================================================
;---------------------------------------------------
; Entry point
;---------------------------------------------------
ENTRY &ImageName
// Later these can be parameterized
&TargetPkg="Qcs405Pkg"
// These settings come from .../src/soc/qualcomm/qcs405/include/soc/memlayout.ld
&BBEntryAddr=0x8c2f000
&VEREntryAddr=0x8C00000
&ROMEntryAddr=0x8C00000
&QCLEntryAddr=0x1485AC00
&RAMEntryAddr=0x9F860000
&BL31EntryAddr=0x06820000
&DCEntryAddr=0xf1104800
&KernelEntryAddr=0x90080000
&PreRamConsoleAddr=0x8C4F400
&VBoot2Work=0x8C47000
&Stack=0x8C4B000
&Ttb=0x8C39000
&Timestamp=0x8C4F000
&PreRamCbfsCache=0x8C57400
&CbmemTop=0x280000000
&PostRamCbfsCache=0x9F800000
// End of memlayout.ld settings
// Common commands irrespective of &Mode
PATH
&CwDir=os.pwd()
PATH + &CwDir
// position at top of coreboot tree
// find depth count for source loading
cd ..\..\..\..
&srcpath=os.pwd()
b.sel PROGRAM onchip
;sys.u
b.d /all
;go &BBEntryAddr
;wait !run()
;---------------------------------------------------
; Setup area and log
;---------------------------------------------------
area.clear
area.reset
area.create CB_Logs 1000. 8192.
area.select CB_Logs
;winclear
;b.d /all
if FILE.EXIST("C:\TEMP\WIN.CMM")
do C:\TEMP\WIN.CMM
area.view CB_Logs
PRINT %String "Source Path: &srcpath"
symbol.sourcepath.setbasedir &srcpath\src
PRINT "pbl32_to_bootblock64 jump"
do pbl32_to_bootblock64_jump.cmm
do clear_bss.cmm
WAIT 5s
b
// Make parsing simple, upper-case parameters
&Imagename=STRING.UPR("&Imagename")
IF (STR.CP("&ImageName","DEBUG,*"))
(
&debug="DEBUG"
)
ELSE
(
&debug=""
)
&Imagename=STR.CUT("&ImageName",6)
IF "&debug"==""
(
PRINT "SPI_RAM LOAD"
&ImageName=STRING.UPR("&ImageName")
IF "&ImageName"==""
(
&ImageName="RAM,BB" //for RAM load Bootblock only and jump till DC
)
PRINT "&ImageName"
)
ELSE
(
if (STR.CP("&debug","DEBUG"))
(
PRINT "DEBUG"
&ImageName=STRING.UPR("&ImageName")
IF "&ImageName"==""
(
&ImageName="RAM,ALL" //for RAM loading all the images
)
PRINT "&ImageName"
)
)
DO debug_cb_common.cmm &TargetPkg &srcpath &xblsrcpath &ImageName
enddo

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@ -104,6 +104,10 @@ ENTRY &TargetPkg &srcpath &xblsrcpath &ImageName
if &BBStage if &BBStage
( (
IF "&debug"==""
(
d.load.binary build/coreboot.rom 0xA0000000
)
&imgpath="build\cbfs\fallback\bootblock.elf" &imgpath="build\cbfs\fallback\bootblock.elf"
if (&RAMLoad) if (&RAMLoad)
d.load.elf &imgpath /strippart "coreboot" /sourcepath &srcpath d.load.elf &imgpath /strippart "coreboot" /sourcepath &srcpath
@ -114,9 +118,17 @@ ENTRY &TargetPkg &srcpath &xblsrcpath &ImageName
;b.s run_romstage /o ;b.s run_romstage /o
;d.set &PreRamConsoleAddr++0x8000 0 ;d.set &PreRamConsoleAddr++0x8000 0
d.dump &PreRamConsoleAddr /spotlight d.dump &PreRamConsoleAddr /spotlight
print %String "Now the control is in BootBlock, press enter after debugging to go to next stage" IF (STR.CP("&debug","DEBUG"))
print %String "Press enter to go to next stage" (
enter print %String "Now the control is in BootBlock, press enter after debugging to go to next stage"
print %String "Press enter to go to next stage"
enter
)
ELSE
(
go
enddo
)
) )
go &VEREntryAddr go &VEREntryAddr

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@ -0,0 +1,15 @@
PER.Set.simple SPR:0x36100 %Long 00c5183C
D.S AZSD:0x8600034 %LE %Long 0x8600000
D.S AZSD:0x8600000 %LE %Long 0x1400000
d.a 0x8600004 ldr r0,0x8600034
d.a 0x8600008 mcr p15,0x0,r0,c12,c0,1
d.a 0x860000c dsb
d.a 0x8600010 isb
d.a 0x8600014 mrc p15,0x0,r1,c12,c0,2
d.a 0x8600018 orr r1,r1,0x3
d.a 0x860001c mcr p15,0x0,r1,c12,c0,2
d.a 0x8600020 isb
d.a 0x8600024 wfi
r.s pc 0x8600004
go
b