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vc/intel/fsp/fsp2_0/alderlake: Update MemInfoHob.h for new FSP 

Sync the MemInfoHob.h with current FSP code.

BUG=b:190339677
TEST=dmidecode -t 17 can show the memory information.

Signed-off-by: Eric Lai <ericr_lai@compal.corp-partner.google.com>
Change-Id: Ifd3e6a264131437c67d17ec80f37f5e8d0a03a79
Reviewed-on: https://review.coreboot.org/c/coreboot/+/55302
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
This commit is contained in:
Eric Lai 2021-06-08 14:51:26 +08:00 committed by Patrick Georgi
parent e766f6ba92
commit 66b090a226
1 changed files with 26 additions and 0 deletions
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26
src/vendorcode/intel/fsp/fsp2_0/alderlake/MemInfoHob.h
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@ -27,6 +27,9 @@ extern EFI_GUID gSiMemoryPlatformDataGuid;
#define MAX_NODE 2
#define MAX_CH 4
#define MAX_DIMM 2
// Must match definitions in
// Intel\ClientOneSiliconPkg\IpBlock\MemoryInit\Mtl\Include\MrcInterface.h
#define HOB_MAX_SAGV_POINTS 4
///
/// Host reset states from MRC.
@ -182,6 +185,10 @@ typedef struct {
UINT16 tCCD_L; ///< Number of tCK cycles for the channel DIMM's minimum CAS-to-CAS delay for same bank group.
} MRC_CH_TIMING;
typedef struct {
UINT16 tRDPRE; ///< Read CAS to Precharge cmd delay
} MRC_IP_TIMING;
///
/// Memory SMBIOS & OC Memory Data Hob
///
@ -224,6 +231,20 @@ typedef struct {
UINT8 Rsvd[2];
} PSMI_MEM_INFO;
/// This data structure contains per-SaGv timing values that are considered output by the MRC.
typedef struct {
UINT32 DataRate; ///< The memory rate for the current SaGv Point in units of MT/s
MRC_CH_TIMING JedecTiming; ///< Timings used for this entry's corresponding SaGv Point - derived from JEDEC SPD spec
MRC_IP_TIMING IpTiming; ///< Timings used for this entry's corresponding SaGv Point - IP specific
} HOB_SAGV_TIMING_OUT;
/// This data structure contains SAGV config values that are considered output by the MRC.
typedef struct {
UINT32 NumSaGvPointsEnabled; ///< Count of the total number of SAGV Points enabled.
UINT32 SaGvPointMask; ///< Bit mask where each bit indicates an enabled SAGV point.
HOB_SAGV_TIMING_OUT SaGvTiming[HOB_MAX_SAGV_POINTS];
} HOB_SAGV_INFO;
typedef struct {
UINT8 Revision;
UINT16 DataWidth; ///< Data width, in bits, of this memory device
@ -244,11 +265,16 @@ typedef struct {
UINT32 TotalPhysicalMemorySize;
UINT32 DefaultXmptCK[MAX_XMP_PROFILE_NUM];///< Stores the tCK value read from SPD XMP profiles if they exist.
UINT8 XmpProfileEnable; ///< If XMP capable DIMMs are detected, this will indicate which XMP Profiles are common among all DIMMs.
UINT8 XmpConfigWarning; ///< If XMP capable DIMMs config support only 1DPC, but 2DPC is installed
UINT8 Ratio; ///< DDR Frequency Ratio, Max Value 255
UINT8 RefClk;
UINT32 VddVoltage[MAX_PROFILE_NUM];
UINT32 VddqVoltage[MAX_PROFILE_NUM];
UINT32 VppVoltage[MAX_PROFILE_NUM];
CONTROLLER_INFO Controller[MAX_NODE];
UINT16 Ratio_UINT16; ///< DDR Frequency Ratio, used for programs that require ratios higher then 255
UINT32 NumPopulatedChannels; ///< Total number of memory channels populated
HOB_SAGV_INFO SagvConfigInfo; ///< This data structure contains SAGV config values that are considered output by the MRC.
} MEMORY_INFO_DATA_HOB;
/**