soc/intel/quark: Add ESRAM display to FSP 1.1

Add ESRAM display to FSP 1.1

TEST=Build and run on Galileo Gen2

Change-Id: Ia47b0bdba65606a7f0695332d298fc1e910b0e2f
Signed-off-by: Lee Leahy <leroy.p.leahy@intel.com>
Reviewed-on: https://review.coreboot.org/18804
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Tested-by: build bot (Jenkins)
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
This commit is contained in:
Lee Leahy 2017-03-13 17:03:31 -07:00
parent 6edb314050
commit 66b0d55d32
2 changed files with 33 additions and 1 deletions

View File

@ -177,7 +177,6 @@ config DCACHE_RAM_SIZE
config DISPLAY_ESRAM_LAYOUT config DISPLAY_ESRAM_LAYOUT
bool "Display ESRAM layout" bool "Display ESRAM layout"
default n default n
depends on PLATFORM_USES_FSP2_0
help help
Select this option to display coreboot's use of ESRAM. Select this option to display coreboot's use of ESRAM.

View File

@ -105,6 +105,39 @@ void soc_memory_init_params(struct romstage_params *params,
if (!rmu_file) if (!rmu_file)
die("Microcode file (rmu.bin) not found."); die("Microcode file (rmu.bin) not found.");
/* Display the ESRAM layout */
if (IS_ENABLED(CONFIG_DISPLAY_ESRAM_LAYOUT)) {
printk(BIOS_SPEW, "\nESRAM Layout:\n\n");
printk(BIOS_SPEW,
"+-------------------+ 0x80080000 - ESRAM end\n");
if (_car_relocatable_data_end != (void *)0x80080000) {
printk(BIOS_SPEW, "| |\n");
printk(BIOS_SPEW, "+-------------------+ 0x%p\n",
_car_relocatable_data_end);
}
printk(BIOS_SPEW, "| coreboot data |\n");
printk(BIOS_SPEW, "+-------------------+ 0x%p\n",
_car_stack_end);
printk(BIOS_SPEW, "| coreboot stack |\n");
printk(BIOS_SPEW, "+-------------------+ 0x%p",
_car_stack_start);
if (IS_ENABLED(CONFIG_SEPARATE_VERSTAGE)) {
printk(BIOS_SPEW, "\n");
printk(BIOS_SPEW, "| vboot data |\n");
printk(BIOS_SPEW, "+-------------------+ 0x%08x",
CONFIG_DCACHE_RAM_BASE);
}
printk(BIOS_SPEW, " (CONFIG_DCACHE_RAM_BASE)\n");
printk(BIOS_SPEW, "| FSP data |\n");
printk(BIOS_SPEW, "+-------------------+\n");
printk(BIOS_SPEW, "| FSP stack |\n");
printk(BIOS_SPEW, "+-------------------+\n");
printk(BIOS_SPEW, "| FSP binary |\n");
printk(BIOS_SPEW,
"+-------------------+ 0x80000000 - ESRAM start\n\n");
}
/* Update the UPD data for MemoryInit */ /* Update the UPD data for MemoryInit */
upd->AddrMode = config->AddrMode; upd->AddrMode = config->AddrMode;
upd->ChanMask = config->ChanMask; upd->ChanMask = config->ChanMask;