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mb/google/brask/var/constitution: update gpio settings 

Remove GPP_D11,GPP_D12 in ramstage, follow baseboard brask setting.

TEST=emerge-brask coreboot
     make sure HDMIA can display

Change-Id: I953170f006699e3dc9d6111ded8234f66b9162c7
Signed-off-by: Morris Hsu <morris-hsu@quanta.corp-partner.google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/73508
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: David Wu <david_wu@quanta.corp-partner.google.com>
Reviewed-by: Eric Lai <eric_lai@quanta.corp-partner.google.com>
Reviewed-by: Ivy Jian <ivy.jian@quanta.corp-partner.google.com>
This commit is contained in:
Morris Hsu 2023-03-07 15:45:26 +08:00 committed by Eric Lai
parent 5f03f53abc
commit 66c1d0dd32
1 changed files with 0 additions and 4 deletions
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4
src/mainboard/google/brya/variants/constitution/gpio.c
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@ -29,10 +29,6 @@ static const struct pad_config override_gpio_table[] = {
PAD_NC_LOCK(GPP_D9, NONE, LOCK_CONFIG),
/* D10 : ISH_SPI_CS# ==> NC */
PAD_NC_LOCK(GPP_D10, NONE, LOCK_CONFIG),
/* D11 : ISH_SPI_MISO ==> NC */
PAD_NC_LOCK(GPP_D11, NONE, LOCK_CONFIG),
/* D12 : ISH_SPI_MOSI ==> NC */
PAD_NC_LOCK(GPP_D12, NONE, LOCK_CONFIG),
/* D13 : ISH_UART0_RXD ==> PCH_I2C_U3A0_SDA */
PAD_CFG_NF_LOCK(GPP_D13, NONE, NF3, LOCK_CONFIG),
/* D14 : ISH_UART0_TXD ==> PCH_I2C_U3A0_SCL */