From 66c6532eb6017830e677cf60c3c37ed01c733031 Mon Sep 17 00:00:00 2001 From: Edward O'Callaghan Date: Fri, 21 Nov 2014 01:43:38 +1100 Subject: [PATCH] northbridge/amd/agesa/family16kb: Add MMCONF res to PCI_DOMAIN MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit This is a port of the following: commit d5c998be99709c92f200b3b08aed2ca3fee2d519 The coreboot resource allocator doesn't respect resources claimed in the APIC_CLUSTER. Move the MMCONF resource to the PCI_DOMAIN to prevent overlap with PCI devices. Change-Id: I49167dd3f15d0203a7db8950880ab03171d5c170 Signed-off-by: Edward O'Callaghan Reviewed-on: http://review.coreboot.org/7533 Tested-by: build bot (Jenkins) Reviewed-by: Kyösti Mälkki --- .../amd/agesa/family16kb/northbridge.c | 43 +++++++++---------- 1 file changed, 21 insertions(+), 22 deletions(-) diff --git a/src/northbridge/amd/agesa/family16kb/northbridge.c b/src/northbridge/amd/agesa/family16kb/northbridge.c index 9c2cbfb64f..d28b046986 100644 --- a/src/northbridge/amd/agesa/family16kb/northbridge.c +++ b/src/northbridge/amd/agesa/family16kb/northbridge.c @@ -338,6 +338,19 @@ static void read_resources(device_t dev) amdfam16_link_read_bases(dev, nodeid, link->link_num); } } + + /* + * This MMCONF resource must be reserved in the PCI_DOMAIN. + * It is not honored by the coreboot resource allocator if it is in + * the APIC_CLUSTER. + */ +#if CONFIG_MMCONF_SUPPORT + struct resource *resource = new_resource(dev, 0xc0010058); + resource->base = CONFIG_MMCONF_BASE_ADDRESS; + resource->size = CONFIG_MMCONF_BUS_NUMBER * 4096 * 256; + resource->flags = IORESOURCE_MEM | IORESOURCE_RESERVE | + IORESOURCE_FIXED | IORESOURCE_STORED | IORESOURCE_ASSIGNED; +#endif } static void set_resource(device_t dev, struct resource *resource, u32 nodeid) @@ -441,6 +454,12 @@ static void set_resources(device_t dev) assign_resources(bus); } } + + /* Print the MMCONF region if it has been reserved. */ + res = find_resource(dev, 0xc0010058); + if (res) { + report_resource_stored(dev, res, " "); + } } #if 0 /* TODO: Check if needed. */ @@ -1056,29 +1075,9 @@ static void cpu_bus_init(device_t dev) initialize_cpus(dev->link_list); } -static void cpu_bus_read_resources(device_t dev) -{ -#if CONFIG_MMCONF_SUPPORT - struct resource *resource = new_resource(dev, 0xc0010058); - resource->base = CONFIG_MMCONF_BASE_ADDRESS; - resource->size = CONFIG_MMCONF_BUS_NUMBER * 4096*256; - resource->flags = IORESOURCE_MEM | IORESOURCE_RESERVE | - IORESOURCE_FIXED | IORESOURCE_STORED | IORESOURCE_ASSIGNED; -#endif -} - -static void cpu_bus_set_resources(device_t dev) -{ - struct resource *resource = find_resource(dev, 0xc0010058); - if (resource) { - report_resource_stored(dev, resource, " "); - } - pci_dev_set_resources(dev); -} - static struct device_operations cpu_bus_ops = { - .read_resources = cpu_bus_read_resources, - .set_resources = cpu_bus_set_resources, + .read_resources = DEVICE_NOOP, + .set_resources = DEVICE_NOOP, .enable_resources = DEVICE_NOOP, .init = cpu_bus_init, .scan_bus = cpu_bus_scan,