From 66ce18c508ffff42d290d4316b72d5fd153f8260 Mon Sep 17 00:00:00 2001 From: Philipp Deppenwiese Date: Sat, 28 Jul 2018 23:34:20 +0200 Subject: [PATCH] soc/intel: Remove legacy static TPM asl code Since the TPM software stack refactoring static TPM ACPI code isn't needed anymore. Change-Id: I36a99cbc420ecfa55aa5c89787151d482225adf2 Signed-off-by: Philipp Deppenwiese Reviewed-on: https://review.coreboot.org/27715 Reviewed-by: Felix Held Tested-by: build bot (Jenkins) --- src/soc/intel/baytrail/acpi/lpc.asl | 23 ----------------------- src/soc/intel/braswell/acpi/lpc.asl | 23 ----------------------- src/soc/intel/denverton_ns/acpi/lpc.asl | 24 ------------------------ src/soc/intel/fsp_baytrail/acpi/lpc.asl | 23 ----------------------- 4 files changed, 93 deletions(-) diff --git a/src/soc/intel/baytrail/acpi/lpc.asl b/src/soc/intel/baytrail/acpi/lpc.asl index 17d6f43574..00aac51e23 100644 --- a/src/soc/intel/baytrail/acpi/lpc.asl +++ b/src/soc/intel/baytrail/acpi/lpc.asl @@ -135,27 +135,4 @@ Device (LPCB) // Include mainboard's superio.asl file. #include "acpi/superio.asl" - -#if IS_ENABLED(CONFIG_LPC_TPM) - Device (TPM) // Trusted Platform Module - { - Name(_HID, EISAID("IFX0102")) - Name(_CID, 0x310cd041) - Name(_UID, 1) - - Method(_STA, 0) - { - If (TPMP) { - Return (0xf) - } - Return (0x0) - } - - Name(_CRS, ResourceTemplate() { - IO (Decode16, 0x2e, 0x2e, 0x01, 0x02) - IO (Decode16, 0x6f0, 0x6f0, 0x01, 0x10) - Memory32Fixed (ReadWrite, 0xfed40000, 0x5000) - }) - } -#endif } diff --git a/src/soc/intel/braswell/acpi/lpc.asl b/src/soc/intel/braswell/acpi/lpc.asl index eb4a16a88f..0a8b8bc081 100644 --- a/src/soc/intel/braswell/acpi/lpc.asl +++ b/src/soc/intel/braswell/acpi/lpc.asl @@ -137,27 +137,4 @@ Device (LPCB) /* Include mainboard's superio.asl file. */ #include "acpi/superio.asl" - -#if IS_ENABLED(CONFIG_LPC_TPM) - Device (TPM) /* Trusted Platform Module */ - { - Name(_HID, EISAID("IFX0102")) - Name(_CID, 0x310cd041) - Name(_UID, 1) - - Method(_STA, 0) - { - If (TPMP) { - Return (0xf) - } - Return (0x0) - } - - Name(_CRS, ResourceTemplate() { - IO (Decode16, 0x2e, 0x2e, 0x01, 0x02) - IO (Decode16, 0x6f0, 0x6f0, 0x01, 0x10) - Memory32Fixed (ReadWrite, 0xfed40000, 0x5000) - }) - } -#endif } diff --git a/src/soc/intel/denverton_ns/acpi/lpc.asl b/src/soc/intel/denverton_ns/acpi/lpc.asl index 3167c183d8..cc36451de2 100644 --- a/src/soc/intel/denverton_ns/acpi/lpc.asl +++ b/src/soc/intel/denverton_ns/acpi/lpc.asl @@ -205,28 +205,4 @@ Device (LPCB) Return(BUF0) } } - -#ifdef ENABLE_TPM - Device (TPM) // Trusted Platform Module - { - Name(_HID, EISAID("IFX0102")) - Name(_CID, 0x310cd041) - Name(_UID, 1) - - Method(_STA, 0) - { - If (TPMP) { - Return (0xf) - } - Return (0x0) - } - - Name(_CRS, ResourceTemplate() { - IO (Decode16, 0x2e, 0x2e, 0x01, 0x02) - IO (Decode16, 0x6f0, 0x6f0, 0x01, 0x10) - Memory32Fixed (ReadWrite, 0xfed40000, 0x5000) - IRQ (Edge, Activehigh, Exclusive) { 6 } - }) - } -#endif } diff --git a/src/soc/intel/fsp_baytrail/acpi/lpc.asl b/src/soc/intel/fsp_baytrail/acpi/lpc.asl index 17d6f43574..00aac51e23 100644 --- a/src/soc/intel/fsp_baytrail/acpi/lpc.asl +++ b/src/soc/intel/fsp_baytrail/acpi/lpc.asl @@ -135,27 +135,4 @@ Device (LPCB) // Include mainboard's superio.asl file. #include "acpi/superio.asl" - -#if IS_ENABLED(CONFIG_LPC_TPM) - Device (TPM) // Trusted Platform Module - { - Name(_HID, EISAID("IFX0102")) - Name(_CID, 0x310cd041) - Name(_UID, 1) - - Method(_STA, 0) - { - If (TPMP) { - Return (0xf) - } - Return (0x0) - } - - Name(_CRS, ResourceTemplate() { - IO (Decode16, 0x2e, 0x2e, 0x01, 0x02) - IO (Decode16, 0x6f0, 0x6f0, 0x01, 0x10) - Memory32Fixed (ReadWrite, 0xfed40000, 0x5000) - }) - } -#endif }