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mb/*/*/buildOpts.c: Clean up whitespace 

Drop multiple blank lines and use one space inside C-style comments.

TEST=Use abuild --timeless to check that all AGESA f14/f15tn/f16kb
mainboards result in identical coreboot binaries.

Change-Id: Ibe1f279dd22ae7657ea7b7766f88004dbf4dceb5
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/41589
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Mike Banon <mikebdp2@gmail.com>
Reviewed-by: Krystian Hebel <krystian.hebel@3mdeb.com>
This commit is contained in:
Angel Pons 2020-05-20 23:34:54 +02:00 committed by Nico Huber
parent 927f6ae84a
commit 66ee42daba
25 changed files with 96 additions and 180 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

8
src/mainboard/amd/inagua/buildOpts.c
View File

@ -9,11 +9,8 @@
* build option selections desired for that platform. * build option selections desired for that platform.
* *
* For Information about this file, see @ref platforminstall. * For Information about this file, see @ref platforminstall.
*
*/ */
/* Select the CPU family. */ /* Select the CPU family. */
#define INSTALL_FAMILY_10_SUPPORT FALSE #define INSTALL_FAMILY_10_SUPPORT FALSE
#define INSTALL_FAMILY_12_SUPPORT FALSE #define INSTALL_FAMILY_12_SUPPORT FALSE
@ -85,7 +82,6 @@
#define BLDOPT_REMOVE_GFX_RECOVERY TRUE #define BLDOPT_REMOVE_GFX_RECOVERY TRUE
#define BLDOPT_REMOVE_EARLY_SAMPLES TRUE #define BLDOPT_REMOVE_EARLY_SAMPLES TRUE
#define BLDCFG_PCI_MMIO_BASE CONFIG_MMCONF_BASE_ADDRESS #define BLDCFG_PCI_MMIO_BASE CONFIG_MMCONF_BASE_ADDRESS
#define BLDCFG_PCI_MMIO_SIZE CONFIG_MMCONF_BUS_NUMBER #define BLDCFG_PCI_MMIO_SIZE CONFIG_MMCONF_BUS_NUMBER
@ -206,7 +202,7 @@ CONST AP_MTRR_SETTINGS ROMDATA OntarioApMtrrSettingsList[] =
{ CPU_LIST_TERMINAL } { CPU_LIST_TERMINAL }
}; };
/* Include the files that instantiate the configuration definitions. */ /* Include the files that instantiate the configuration definitions. */
#include "cpuRegisters.h" #include "cpuRegisters.h"
#include "cpuFamRegisters.h" #include "cpuFamRegisters.h"
@ -252,7 +248,7 @@ CONST AP_MTRR_SETTINGS ROMDATA OntarioApMtrrSettingsList[] =
#define DDR1866_FREQUENCY 933 ///< DDR 1866 #define DDR1866_FREQUENCY 933 ///< DDR 1866
#define UNSUPPORTED_DDR_FREQUENCY 934 ///< Highest limit of DDR frequency #define UNSUPPORTED_DDR_FREQUENCY 934 ///< Highest limit of DDR frequency
/* QUANDRANK_TYPE*/ /* QUANDRANK_TYPE */
#define QUADRANK_REGISTERED 0 ///< Quadrank registered DIMM #define QUADRANK_REGISTERED 0 ///< Quadrank registered DIMM
#define QUADRANK_UNBUFFERED 1 ///< Quadrank unbuffered DIMM #define QUADRANK_UNBUFFERED 1 ///< Quadrank unbuffered DIMM

9
src/mainboard/amd/olivehill/buildOpts.c
View File

@ -9,7 +9,6 @@
* build option selections desired for that platform. * build option selections desired for that platform.
* *
* For Information about this file, see @ref platforminstall. * For Information about this file, see @ref platforminstall.
*
*/ */
#include <AGESA.h> #include <AGESA.h>
@ -29,7 +28,6 @@
#define INSTALL_AM3_SOCKET_SUPPORT FALSE #define INSTALL_AM3_SOCKET_SUPPORT FALSE
#define INSTALL_FM2_SOCKET_SUPPORT FALSE #define INSTALL_FM2_SOCKET_SUPPORT FALSE
#ifdef BLDOPT_REMOVE_FT3_SOCKET_SUPPORT #ifdef BLDOPT_REMOVE_FT3_SOCKET_SUPPORT
#if BLDOPT_REMOVE_FT3_SOCKET_SUPPORT == TRUE #if BLDOPT_REMOVE_FT3_SOCKET_SUPPORT == TRUE
#undef INSTALL_FT3_SOCKET_SUPPORT #undef INSTALL_FT3_SOCKET_SUPPORT
@ -152,7 +150,7 @@
#define BLDCFG_PROCESSOR_SCOPE_NAME1 '0' #define BLDCFG_PROCESSOR_SCOPE_NAME1 '0'
#define BLDCFG_PCIE_TRAINING_ALGORITHM PcieTrainingDistributed #define BLDCFG_PCIE_TRAINING_ALGORITHM PcieTrainingDistributed
/* Process the options... /* Process the options...
* This file include MUST occur AFTER the user option selection settings * This file include MUST occur AFTER the user option selection settings
*/ */
/* /*
@ -214,8 +212,7 @@ CONST AP_MTRR_SETTINGS ROMDATA KabiniApMtrrSettingsList[] =
#define BLDCFG_AP_MTRR_SETTINGS_LIST &KabiniApMtrrSettingsList #define BLDCFG_AP_MTRR_SETTINGS_LIST &KabiniApMtrrSettingsList
/* Include the files that instantiate the configuration definitions. */
/* Include the files that instantiate the configuration definitions. */
#include "cpuRegisters.h" #include "cpuRegisters.h"
#include "cpuFamRegisters.h" #include "cpuFamRegisters.h"
#include "cpuFamilyTranslation.h" #include "cpuFamilyTranslation.h"
@ -250,7 +247,7 @@ CONST AP_MTRR_SETTINGS ROMDATA KabiniApMtrrSettingsList[] =
//#define DDR2400_FREQUENCY 1200 ///< DDR 2400 //#define DDR2400_FREQUENCY 1200 ///< DDR 2400
//#define UNSUPPORTED_DDR_FREQUENCY 1201 ///< Highest limit of DDR frequency //#define UNSUPPORTED_DDR_FREQUENCY 1201 ///< Highest limit of DDR frequency
// //
///* QUANDRANK_TYPE*/ ///* QUANDRANK_TYPE */
//#define QUADRANK_REGISTERED 0 ///< Quadrank registered DIMM //#define QUADRANK_REGISTERED 0 ///< Quadrank registered DIMM
//#define QUADRANK_UNBUFFERED 1 ///< Quadrank unbuffered DIMM //#define QUADRANK_UNBUFFERED 1 ///< Quadrank unbuffered DIMM
// //

14
src/mainboard/amd/parmer/buildOpts.c
View File

@ -9,18 +9,17 @@
* build option selections desired for that platform. * build option selections desired for that platform.
* *
* For Information about this file, see @ref platforminstall. * For Information about this file, see @ref platforminstall.
*
*/ */
#include <AGESA.h> #include <AGESA.h>
/* Select the CPU family. */ /* Select the CPU family. */
#define INSTALL_FAMILY_10_SUPPORT FALSE #define INSTALL_FAMILY_10_SUPPORT FALSE
#define INSTALL_FAMILY_12_SUPPORT FALSE #define INSTALL_FAMILY_12_SUPPORT FALSE
#define INSTALL_FAMILY_14_SUPPORT FALSE #define INSTALL_FAMILY_14_SUPPORT FALSE
#define INSTALL_FAMILY_15_MODEL_1x_SUPPORT TRUE #define INSTALL_FAMILY_15_MODEL_1x_SUPPORT TRUE
/* Select the CPU socket type. */ /* Select the CPU socket type. */
#define INSTALL_G34_SOCKET_SUPPORT FALSE #define INSTALL_G34_SOCKET_SUPPORT FALSE
#define INSTALL_C32_SOCKET_SUPPORT FALSE #define INSTALL_C32_SOCKET_SUPPORT FALSE
#define INSTALL_S1G3_SOCKET_SUPPORT FALSE #define INSTALL_S1G3_SOCKET_SUPPORT FALSE
@ -141,7 +140,7 @@
#if CONFIG(GFXUMA) #if CONFIG(GFXUMA)
#define BLDCFG_UMA_ALIGNMENT UMA_4MB_ALIGNED #define BLDCFG_UMA_ALIGNMENT UMA_4MB_ALIGNED
#define BLDCFG_UMA_ALLOCATION_MODE UMA_SPECIFIED #define BLDCFG_UMA_ALLOCATION_MODE UMA_SPECIFIED
//#define BLDCFG_UMA_ALLOCATION_SIZE 0x1000//0x1800//0x1000 /* (1000 << 16) = 256M*/ //#define BLDCFG_UMA_ALLOCATION_SIZE 0x1000//0x1800//0x1000 /* (1000 << 16) = 256M */
#define BLDCFG_UMA_ALLOCATION_SIZE 0x2000//512M #define BLDCFG_UMA_ALLOCATION_SIZE 0x2000//512M
#define BLDCFG_UMA_ABOVE4G_SUPPORT FALSE #define BLDCFG_UMA_ABOVE4G_SUPPORT FALSE
#endif #endif
@ -153,7 +152,7 @@
//#define BLDCFG_IGPU_HD_AUDIO_SUBSYSTEM_ID OEM_IGPU_HD_AUDIO_SSID //#define BLDCFG_IGPU_HD_AUDIO_SUBSYSTEM_ID OEM_IGPU_HD_AUDIO_SSID
//#define BLFCFG_APU_PCIE_PORTS_SUBSYSTEM_ID OEM_APU_PCIE_PORTS_SSID //#define BLFCFG_APU_PCIE_PORTS_SUBSYSTEM_ID OEM_APU_PCIE_PORTS_SSID
/* Process the options... /* Process the options...
* This file include MUST occur AFTER the user option selection settings * This file include MUST occur AFTER the user option selection settings
*/ */
/* /*
@ -215,8 +214,7 @@ CONST AP_MTRR_SETTINGS ROMDATA TrinityApMtrrSettingsList[] =
#define BLDCFG_AP_MTRR_SETTINGS_LIST &TrinityApMtrrSettingsList #define BLDCFG_AP_MTRR_SETTINGS_LIST &TrinityApMtrrSettingsList
/* Include the files that instantiate the configuration definitions. */
/* Include the files that instantiate the configuration definitions. */
#include "cpuRegisters.h" #include "cpuRegisters.h"
#include "cpuFamRegisters.h" #include "cpuFamRegisters.h"
#include "cpuFamilyTranslation.h" #include "cpuFamilyTranslation.h"
@ -251,7 +249,7 @@ CONST AP_MTRR_SETTINGS ROMDATA TrinityApMtrrSettingsList[] =
#define DDR2400_FREQUENCY 1200 ///< DDR 2400 #define DDR2400_FREQUENCY 1200 ///< DDR 2400
#define UNSUPPORTED_DDR_FREQUENCY 1201 ///< Highest limit of DDR frequency #define UNSUPPORTED_DDR_FREQUENCY 1201 ///< Highest limit of DDR frequency
/* QUANDRANK_TYPE*/ /* QUANDRANK_TYPE */
#define QUADRANK_REGISTERED 0 ///< Quadrank registered DIMM #define QUADRANK_REGISTERED 0 ///< Quadrank registered DIMM
#define QUADRANK_UNBUFFERED 1 ///< Quadrank unbuffered DIMM #define QUADRANK_UNBUFFERED 1 ///< Quadrank unbuffered DIMM

12
src/mainboard/amd/persimmon/buildOpts.c
View File

@ -9,18 +9,15 @@
* build option selections desired for that platform. * build option selections desired for that platform.
* *
* For Information about this file, see @ref platforminstall. * For Information about this file, see @ref platforminstall.
*
*/ */
/* Select the CPU family. */
/* Select the CPU family. */
#define INSTALL_FAMILY_10_SUPPORT FALSE #define INSTALL_FAMILY_10_SUPPORT FALSE
#define INSTALL_FAMILY_12_SUPPORT FALSE #define INSTALL_FAMILY_12_SUPPORT FALSE
#define INSTALL_FAMILY_14_SUPPORT TRUE #define INSTALL_FAMILY_14_SUPPORT TRUE
#define INSTALL_FAMILY_15_SUPPORT FALSE #define INSTALL_FAMILY_15_SUPPORT FALSE
/* Select the CPU socket type. */ /* Select the CPU socket type. */
#define INSTALL_G34_SOCKET_SUPPORT FALSE #define INSTALL_G34_SOCKET_SUPPORT FALSE
#define INSTALL_C32_SOCKET_SUPPORT FALSE #define INSTALL_C32_SOCKET_SUPPORT FALSE
#define INSTALL_S1G3_SOCKET_SUPPORT FALSE #define INSTALL_S1G3_SOCKET_SUPPORT FALSE
@ -85,7 +82,6 @@
#define BLDOPT_REMOVE_GFX_RECOVERY TRUE #define BLDOPT_REMOVE_GFX_RECOVERY TRUE
#define BLDOPT_REMOVE_EARLY_SAMPLES TRUE #define BLDOPT_REMOVE_EARLY_SAMPLES TRUE
#define BLDCFG_PCI_MMIO_BASE CONFIG_MMCONF_BASE_ADDRESS #define BLDCFG_PCI_MMIO_BASE CONFIG_MMCONF_BASE_ADDRESS
#define BLDCFG_PCI_MMIO_SIZE CONFIG_MMCONF_BUS_NUMBER #define BLDCFG_PCI_MMIO_SIZE CONFIG_MMCONF_BUS_NUMBER
@ -206,7 +202,7 @@ CONST AP_MTRR_SETTINGS ROMDATA OntarioApMtrrSettingsList[] =
{ CPU_LIST_TERMINAL } { CPU_LIST_TERMINAL }
}; };
/* Include the files that instantiate the configuration definitions. */ /* Include the files that instantiate the configuration definitions. */
#include "cpuRegisters.h" #include "cpuRegisters.h"
#include "cpuFamRegisters.h" #include "cpuFamRegisters.h"
@ -252,7 +248,7 @@ CONST AP_MTRR_SETTINGS ROMDATA OntarioApMtrrSettingsList[] =
#define DDR1866_FREQUENCY 933 ///< DDR 1866 #define DDR1866_FREQUENCY 933 ///< DDR 1866
#define UNSUPPORTED_DDR_FREQUENCY 934 ///< Highest limit of DDR frequency #define UNSUPPORTED_DDR_FREQUENCY 934 ///< Highest limit of DDR frequency
/* QUANDRANK_TYPE*/ /* QUANDRANK_TYPE */
#define QUADRANK_REGISTERED 0 ///< Quadrank registered DIMM #define QUADRANK_REGISTERED 0 ///< Quadrank registered DIMM
#define QUADRANK_UNBUFFERED 1 ///< Quadrank unbuffered DIMM #define QUADRANK_UNBUFFERED 1 ///< Quadrank unbuffered DIMM

12
src/mainboard/amd/south_station/buildOpts.c
View File

@ -9,18 +9,15 @@
* build option selections desired for that platform. * build option selections desired for that platform.
* *
* For Information about this file, see @ref platforminstall. * For Information about this file, see @ref platforminstall.
*
*/ */
/* Select the CPU family. */
/* Select the CPU family. */
#define INSTALL_FAMILY_10_SUPPORT FALSE #define INSTALL_FAMILY_10_SUPPORT FALSE
#define INSTALL_FAMILY_12_SUPPORT FALSE #define INSTALL_FAMILY_12_SUPPORT FALSE
#define INSTALL_FAMILY_14_SUPPORT TRUE #define INSTALL_FAMILY_14_SUPPORT TRUE
#define INSTALL_FAMILY_15_SUPPORT FALSE #define INSTALL_FAMILY_15_SUPPORT FALSE
/* Select the CPU socket type. */ /* Select the CPU socket type. */
#define INSTALL_G34_SOCKET_SUPPORT FALSE #define INSTALL_G34_SOCKET_SUPPORT FALSE
#define INSTALL_C32_SOCKET_SUPPORT FALSE #define INSTALL_C32_SOCKET_SUPPORT FALSE
#define INSTALL_S1G3_SOCKET_SUPPORT FALSE #define INSTALL_S1G3_SOCKET_SUPPORT FALSE
@ -85,7 +82,6 @@
#define BLDOPT_REMOVE_GFX_RECOVERY TRUE #define BLDOPT_REMOVE_GFX_RECOVERY TRUE
#define BLDOPT_REMOVE_EARLY_SAMPLES TRUE #define BLDOPT_REMOVE_EARLY_SAMPLES TRUE
#define BLDCFG_PCI_MMIO_BASE CONFIG_MMCONF_BASE_ADDRESS #define BLDCFG_PCI_MMIO_BASE CONFIG_MMCONF_BASE_ADDRESS
#define BLDCFG_PCI_MMIO_SIZE CONFIG_MMCONF_BUS_NUMBER #define BLDCFG_PCI_MMIO_SIZE CONFIG_MMCONF_BUS_NUMBER
@ -206,7 +202,7 @@ CONST AP_MTRR_SETTINGS ROMDATA OntarioApMtrrSettingsList[] =
{ CPU_LIST_TERMINAL } { CPU_LIST_TERMINAL }
}; };
/* Include the files that instantiate the configuration definitions. */ /* Include the files that instantiate the configuration definitions. */
#include "cpuRegisters.h" #include "cpuRegisters.h"
#include "cpuFamRegisters.h" #include "cpuFamRegisters.h"
@ -252,7 +248,7 @@ CONST AP_MTRR_SETTINGS ROMDATA OntarioApMtrrSettingsList[] =
#define DDR1866_FREQUENCY 933 ///< DDR 1866 #define DDR1866_FREQUENCY 933 ///< DDR 1866
#define UNSUPPORTED_DDR_FREQUENCY 934 ///< Highest limit of DDR frequency #define UNSUPPORTED_DDR_FREQUENCY 934 ///< Highest limit of DDR frequency
/* QUANDRANK_TYPE*/ /* QUANDRANK_TYPE */
#define QUADRANK_REGISTERED 0 ///< Quadrank registered DIMM #define QUADRANK_REGISTERED 0 ///< Quadrank registered DIMM
#define QUADRANK_UNBUFFERED 1 ///< Quadrank unbuffered DIMM #define QUADRANK_UNBUFFERED 1 ///< Quadrank unbuffered DIMM

14
src/mainboard/amd/thatcher/buildOpts.c
View File

@ -9,18 +9,17 @@
* build option selections desired for that platform. * build option selections desired for that platform.
* *
* For Information about this file, see @ref platforminstall. * For Information about this file, see @ref platforminstall.
*
*/ */
#include <AGESA.h> #include <AGESA.h>
/* Select the CPU family. */ /* Select the CPU family. */
#define INSTALL_FAMILY_10_SUPPORT FALSE #define INSTALL_FAMILY_10_SUPPORT FALSE
#define INSTALL_FAMILY_12_SUPPORT FALSE #define INSTALL_FAMILY_12_SUPPORT FALSE
#define INSTALL_FAMILY_14_SUPPORT FALSE #define INSTALL_FAMILY_14_SUPPORT FALSE
#define INSTALL_FAMILY_15_MODEL_1x_SUPPORT TRUE #define INSTALL_FAMILY_15_MODEL_1x_SUPPORT TRUE
/* Select the CPU socket type. */ /* Select the CPU socket type. */
#define INSTALL_G34_SOCKET_SUPPORT FALSE #define INSTALL_G34_SOCKET_SUPPORT FALSE
#define INSTALL_C32_SOCKET_SUPPORT FALSE #define INSTALL_C32_SOCKET_SUPPORT FALSE
#define INSTALL_S1G3_SOCKET_SUPPORT FALSE #define INSTALL_S1G3_SOCKET_SUPPORT FALSE
@ -141,7 +140,7 @@
#if CONFIG(GFXUMA) #if CONFIG(GFXUMA)
#define BLDCFG_UMA_ALIGNMENT UMA_4MB_ALIGNED #define BLDCFG_UMA_ALIGNMENT UMA_4MB_ALIGNED
#define BLDCFG_UMA_ALLOCATION_MODE UMA_SPECIFIED #define BLDCFG_UMA_ALLOCATION_MODE UMA_SPECIFIED
//#define BLDCFG_UMA_ALLOCATION_SIZE 0x1000//0x1800//0x1000 /* (1000 << 16) = 256M*/ //#define BLDCFG_UMA_ALLOCATION_SIZE 0x1000//0x1800//0x1000 /* (1000 << 16) = 256M */
#define BLDCFG_UMA_ALLOCATION_SIZE 0x2000//512M #define BLDCFG_UMA_ALLOCATION_SIZE 0x2000//512M
#define BLDCFG_UMA_ABOVE4G_SUPPORT FALSE #define BLDCFG_UMA_ABOVE4G_SUPPORT FALSE
#endif #endif
@ -153,7 +152,7 @@
//#define BLDCFG_IGPU_HD_AUDIO_SUBSYSTEM_ID OEM_IGPU_HD_AUDIO_SSID //#define BLDCFG_IGPU_HD_AUDIO_SUBSYSTEM_ID OEM_IGPU_HD_AUDIO_SSID
//#define BLFCFG_APU_PCIE_PORTS_SUBSYSTEM_ID OEM_APU_PCIE_PORTS_SSID //#define BLFCFG_APU_PCIE_PORTS_SUBSYSTEM_ID OEM_APU_PCIE_PORTS_SSID
/* Process the options... /* Process the options...
* This file include MUST occur AFTER the user option selection settings * This file include MUST occur AFTER the user option selection settings
*/ */
/* /*
@ -215,8 +214,7 @@ CONST AP_MTRR_SETTINGS ROMDATA TrinityApMtrrSettingsList[] =
#define BLDCFG_AP_MTRR_SETTINGS_LIST &TrinityApMtrrSettingsList #define BLDCFG_AP_MTRR_SETTINGS_LIST &TrinityApMtrrSettingsList
/* Include the files that instantiate the configuration definitions. */
/* Include the files that instantiate the configuration definitions. */
#include "cpuRegisters.h" #include "cpuRegisters.h"
#include "cpuFamRegisters.h" #include "cpuFamRegisters.h"
#include "cpuFamilyTranslation.h" #include "cpuFamilyTranslation.h"
@ -251,7 +249,7 @@ CONST AP_MTRR_SETTINGS ROMDATA TrinityApMtrrSettingsList[] =
#define DDR2400_FREQUENCY 1200 ///< DDR 2400 #define DDR2400_FREQUENCY 1200 ///< DDR 2400
#define UNSUPPORTED_DDR_FREQUENCY 1201 ///< Highest limit of DDR frequency #define UNSUPPORTED_DDR_FREQUENCY 1201 ///< Highest limit of DDR frequency
/* QUANDRANK_TYPE*/ /* QUANDRANK_TYPE */
#define QUADRANK_REGISTERED 0 ///< Quadrank registered DIMM #define QUADRANK_REGISTERED 0 ///< Quadrank registered DIMM
#define QUADRANK_UNBUFFERED 1 ///< Quadrank unbuffered DIMM #define QUADRANK_UNBUFFERED 1 ///< Quadrank unbuffered DIMM

12
src/mainboard/amd/union_station/buildOpts.c
View File

@ -9,18 +9,15 @@
* build option selections desired for that platform. * build option selections desired for that platform.
* *
* For Information about this file, see @ref platforminstall. * For Information about this file, see @ref platforminstall.
*
*/ */
/* Select the CPU family. */
/* Select the CPU family. */
#define INSTALL_FAMILY_10_SUPPORT FALSE #define INSTALL_FAMILY_10_SUPPORT FALSE
#define INSTALL_FAMILY_12_SUPPORT FALSE #define INSTALL_FAMILY_12_SUPPORT FALSE
#define INSTALL_FAMILY_14_SUPPORT TRUE #define INSTALL_FAMILY_14_SUPPORT TRUE
#define INSTALL_FAMILY_15_SUPPORT FALSE #define INSTALL_FAMILY_15_SUPPORT FALSE
/* Select the CPU socket type. */ /* Select the CPU socket type. */
#define INSTALL_G34_SOCKET_SUPPORT FALSE #define INSTALL_G34_SOCKET_SUPPORT FALSE
#define INSTALL_C32_SOCKET_SUPPORT FALSE #define INSTALL_C32_SOCKET_SUPPORT FALSE
#define INSTALL_S1G3_SOCKET_SUPPORT FALSE #define INSTALL_S1G3_SOCKET_SUPPORT FALSE
@ -85,7 +82,6 @@
#define BLDOPT_REMOVE_GFX_RECOVERY TRUE #define BLDOPT_REMOVE_GFX_RECOVERY TRUE
#define BLDOPT_REMOVE_EARLY_SAMPLES TRUE #define BLDOPT_REMOVE_EARLY_SAMPLES TRUE
#define BLDCFG_PCI_MMIO_BASE CONFIG_MMCONF_BASE_ADDRESS #define BLDCFG_PCI_MMIO_BASE CONFIG_MMCONF_BASE_ADDRESS
#define BLDCFG_PCI_MMIO_SIZE CONFIG_MMCONF_BUS_NUMBER #define BLDCFG_PCI_MMIO_SIZE CONFIG_MMCONF_BUS_NUMBER
@ -206,7 +202,7 @@ CONST AP_MTRR_SETTINGS ROMDATA OntarioApMtrrSettingsList[] =
{ CPU_LIST_TERMINAL } { CPU_LIST_TERMINAL }
}; };
/* Include the files that instantiate the configuration definitions. */ /* Include the files that instantiate the configuration definitions. */
#include "cpuRegisters.h" #include "cpuRegisters.h"
#include "cpuFamRegisters.h" #include "cpuFamRegisters.h"
@ -252,7 +248,7 @@ CONST AP_MTRR_SETTINGS ROMDATA OntarioApMtrrSettingsList[] =
#define DDR1866_FREQUENCY 933 ///< DDR 1866 #define DDR1866_FREQUENCY 933 ///< DDR 1866
#define UNSUPPORTED_DDR_FREQUENCY 934 ///< Highest limit of DDR frequency #define UNSUPPORTED_DDR_FREQUENCY 934 ///< Highest limit of DDR frequency
/* QUANDRANK_TYPE*/ /* QUANDRANK_TYPE */
#define QUADRANK_REGISTERED 0 ///< Quadrank registered DIMM #define QUADRANK_REGISTERED 0 ///< Quadrank registered DIMM
#define QUADRANK_UNBUFFERED 1 ///< Quadrank unbuffered DIMM #define QUADRANK_UNBUFFERED 1 ///< Quadrank unbuffered DIMM

9
src/mainboard/asrock/e350m1/buildOpts.c
View File

@ -9,19 +9,17 @@
* build option selections desired for that platform. * build option selections desired for that platform.
* *
* For Information about this file, see @ref platforminstall. * For Information about this file, see @ref platforminstall.
*
*/ */
#include <AGESA.h> #include <AGESA.h>
/* Select the CPU family. */
/* Select the CPU family. */
#define INSTALL_FAMILY_10_SUPPORT FALSE #define INSTALL_FAMILY_10_SUPPORT FALSE
#define INSTALL_FAMILY_12_SUPPORT FALSE #define INSTALL_FAMILY_12_SUPPORT FALSE
#define INSTALL_FAMILY_14_SUPPORT TRUE #define INSTALL_FAMILY_14_SUPPORT TRUE
#define INSTALL_FAMILY_15_SUPPORT FALSE #define INSTALL_FAMILY_15_SUPPORT FALSE
/* Select the CPU socket type. */ /* Select the CPU socket type. */
#define INSTALL_G34_SOCKET_SUPPORT FALSE #define INSTALL_G34_SOCKET_SUPPORT FALSE
#define INSTALL_C32_SOCKET_SUPPORT FALSE #define INSTALL_C32_SOCKET_SUPPORT FALSE
#define INSTALL_S1G3_SOCKET_SUPPORT FALSE #define INSTALL_S1G3_SOCKET_SUPPORT FALSE
@ -86,7 +84,6 @@
#define BLDOPT_REMOVE_GFX_RECOVERY TRUE #define BLDOPT_REMOVE_GFX_RECOVERY TRUE
#define BLDOPT_REMOVE_EARLY_SAMPLES TRUE #define BLDOPT_REMOVE_EARLY_SAMPLES TRUE
/* /*
* Agesa configuration values selection. * Agesa configuration values selection.
* Uncomment and specify the value for the configuration options * Uncomment and specify the value for the configuration options
@ -206,7 +203,7 @@ CONST AP_MTRR_SETTINGS ROMDATA OntarioApMtrrSettingsList[] =
#define BLDCFG_HEAP_DRAM_ADDRESS 0xB0000 #define BLDCFG_HEAP_DRAM_ADDRESS 0xB0000
#define BLDCFG_CFG_TEMP_PCIE_MMIO_BASE_ADDRESS 0xD0000000 #define BLDCFG_CFG_TEMP_PCIE_MMIO_BASE_ADDRESS 0xD0000000
/* Include the files that instantiate the configuration definitions. */ /* Include the files that instantiate the configuration definitions. */
#include "cpuRegisters.h" #include "cpuRegisters.h"
#include "cpuFamRegisters.h" #include "cpuFamRegisters.h"
#include "cpuFamilyTranslation.h" #include "cpuFamilyTranslation.h"

9
src/mainboard/asrock/imb-a180/buildOpts.c
View File

@ -9,7 +9,6 @@
* build option selections desired for that platform. * build option selections desired for that platform.
* *
* For Information about this file, see @ref platforminstall. * For Information about this file, see @ref platforminstall.
*
*/ */
#include <AGESA.h> #include <AGESA.h>
@ -29,7 +28,6 @@
#define INSTALL_AM3_SOCKET_SUPPORT FALSE #define INSTALL_AM3_SOCKET_SUPPORT FALSE
#define INSTALL_FM2_SOCKET_SUPPORT FALSE #define INSTALL_FM2_SOCKET_SUPPORT FALSE
#ifdef BLDOPT_REMOVE_FT3_SOCKET_SUPPORT #ifdef BLDOPT_REMOVE_FT3_SOCKET_SUPPORT
#if BLDOPT_REMOVE_FT3_SOCKET_SUPPORT == TRUE #if BLDOPT_REMOVE_FT3_SOCKET_SUPPORT == TRUE
#undef INSTALL_FT3_SOCKET_SUPPORT #undef INSTALL_FT3_SOCKET_SUPPORT
@ -152,7 +150,7 @@
#define BLDCFG_PROCESSOR_SCOPE_NAME1 '0' #define BLDCFG_PROCESSOR_SCOPE_NAME1 '0'
#define BLDCFG_PCIE_TRAINING_ALGORITHM PcieTrainingDistributed #define BLDCFG_PCIE_TRAINING_ALGORITHM PcieTrainingDistributed
/* Process the options... /* Process the options...
* This file include MUST occur AFTER the user option selection settings * This file include MUST occur AFTER the user option selection settings
*/ */
/* /*
@ -214,8 +212,7 @@ CONST AP_MTRR_SETTINGS ROMDATA KabiniApMtrrSettingsList[] =
#define BLDCFG_AP_MTRR_SETTINGS_LIST &KabiniApMtrrSettingsList #define BLDCFG_AP_MTRR_SETTINGS_LIST &KabiniApMtrrSettingsList
/* Include the files that instantiate the configuration definitions. */
/* Include the files that instantiate the configuration definitions. */
#include "cpuRegisters.h" #include "cpuRegisters.h"
#include "cpuFamRegisters.h" #include "cpuFamRegisters.h"
#include "cpuFamilyTranslation.h" #include "cpuFamilyTranslation.h"
@ -250,7 +247,7 @@ CONST AP_MTRR_SETTINGS ROMDATA KabiniApMtrrSettingsList[] =
//#define DDR2400_FREQUENCY 1200 ///< DDR 2400 //#define DDR2400_FREQUENCY 1200 ///< DDR 2400
//#define UNSUPPORTED_DDR_FREQUENCY 1201 ///< Highest limit of DDR frequency //#define UNSUPPORTED_DDR_FREQUENCY 1201 ///< Highest limit of DDR frequency
// //
///* QUANDRANK_TYPE*/ ///* QUANDRANK_TYPE */
//#define QUADRANK_REGISTERED 0 ///< Quadrank registered DIMM //#define QUADRANK_REGISTERED 0 ///< Quadrank registered DIMM
//#define QUADRANK_UNBUFFERED 1 ///< Quadrank unbuffered DIMM //#define QUADRANK_UNBUFFERED 1 ///< Quadrank unbuffered DIMM
// //

12
src/mainboard/asus/am1i-a/buildOpts.c
View File

@ -9,13 +9,11 @@
* build option selections desired for that platform. * build option selections desired for that platform.
* *
* For Information about this file, see @ref platforminstall. * For Information about this file, see @ref platforminstall.
*
*/ */
#include <vendorcode/amd/agesa/f16kb/AGESA.h> #include <vendorcode/amd/agesa/f16kb/AGESA.h>
/* Include the files that instantiate the configuration definitions. */ /* Include the files that instantiate the configuration definitions. */
#include <vendorcode/amd/agesa/f16kb/Include/AdvancedApi.h> #include <vendorcode/amd/agesa/f16kb/Include/AdvancedApi.h>
#include <vendorcode/amd/agesa/f16kb/Include/GnbInterface.h> #include <vendorcode/amd/agesa/f16kb/Include/GnbInterface.h>
#include <vendorcode/amd/agesa/f16kb/Proc/CPU/cpuFamilyTranslation.h> #include <vendorcode/amd/agesa/f16kb/Proc/CPU/cpuFamilyTranslation.h>
@ -29,10 +27,10 @@
#include <vendorcode/amd/agesa/f16kb/Proc/CPU/cpuEarlyInit.h> #include <vendorcode/amd/agesa/f16kb/Proc/CPU/cpuEarlyInit.h>
#include <vendorcode/amd/agesa/f16kb/Proc/CPU/cpuLateInit.h> #include <vendorcode/amd/agesa/f16kb/Proc/CPU/cpuLateInit.h>
/* Select the CPU family. */ /* Select the CPU family. */
#define INSTALL_FAMILY_16_MODEL_0x_SUPPORT TRUE #define INSTALL_FAMILY_16_MODEL_0x_SUPPORT TRUE
/* Select the CPU socket type. */ /* Select the CPU socket type. */
#define INSTALL_G34_SOCKET_SUPPORT FALSE #define INSTALL_G34_SOCKET_SUPPORT FALSE
#define INSTALL_C32_SOCKET_SUPPORT FALSE #define INSTALL_C32_SOCKET_SUPPORT FALSE
#define INSTALL_S1G3_SOCKET_SUPPORT FALSE #define INSTALL_S1G3_SOCKET_SUPPORT FALSE
@ -178,7 +176,7 @@
//#define BLDCFG_IGPU_HD_AUDIO_SUBSYSTEM_ID OEM_IGPU_HD_AUDIO_SSID //#define BLDCFG_IGPU_HD_AUDIO_SUBSYSTEM_ID OEM_IGPU_HD_AUDIO_SSID
//#define BLFCFG_APU_PCIE_PORTS_SUBSYSTEM_ID OEM_APU_PCIE_PORTS_SSID //#define BLFCFG_APU_PCIE_PORTS_SUBSYSTEM_ID OEM_APU_PCIE_PORTS_SSID
/* Process the options... /* Process the options...
* This file include MUST occur AFTER the user option selection settings * This file include MUST occur AFTER the user option selection settings
*/ */
/* /*
@ -262,7 +260,7 @@ CONST AP_MTRR_SETTINGS ROMDATA KabiniApMtrrSettingsList[] =
//#define DDR2400_FREQUENCY 1200 ///< DDR 2400 //#define DDR2400_FREQUENCY 1200 ///< DDR 2400
//#define UNSUPPORTED_DDR_FREQUENCY 1201 ///< Highest limit of DDR frequency //#define UNSUPPORTED_DDR_FREQUENCY 1201 ///< Highest limit of DDR frequency
// //
///* QUANDRANK_TYPE*/ ///* QUANDRANK_TYPE */
//#define QUADRANK_REGISTERED 0 ///< Quadrank registered DIMM //#define QUADRANK_REGISTERED 0 ///< Quadrank registered DIMM
//#define QUADRANK_UNBUFFERED 1 ///< Quadrank unbuffered DIMM //#define QUADRANK_UNBUFFERED 1 ///< Quadrank unbuffered DIMM
// //

15
src/mainboard/asus/f2a85-m/buildOpts.c
View File

@ -9,13 +9,11 @@
* build option selections desired for that platform. * build option selections desired for that platform.
* *
* For Information about this file, see @ref platforminstall. * For Information about this file, see @ref platforminstall.
*
*/ */
#include <vendorcode/amd/agesa/f15tn/AGESA.h> #include <vendorcode/amd/agesa/f15tn/AGESA.h>
/* Include the files that instantiate the configuration definitions. */ /* Include the files that instantiate the configuration definitions. */
#include <vendorcode/amd/agesa/f15tn/Include/AdvancedApi.h> #include <vendorcode/amd/agesa/f15tn/Include/AdvancedApi.h>
#include <vendorcode/amd/agesa/f15tn/Proc/CPU/cpuFamilyTranslation.h> #include <vendorcode/amd/agesa/f15tn/Proc/CPU/cpuFamilyTranslation.h>
#include <vendorcode/amd/agesa/f15tn/Proc/CPU/Feature/cpuFeatures.h> #include <vendorcode/amd/agesa/f15tn/Proc/CPU/Feature/cpuFeatures.h>
@ -27,14 +25,13 @@
#include <vendorcode/amd/agesa/f15tn/Proc/Mem/mm.h> #include <vendorcode/amd/agesa/f15tn/Proc/Mem/mm.h>
#include <vendorcode/amd/agesa/f15tn/Proc/Mem/mn.h> #include <vendorcode/amd/agesa/f15tn/Proc/Mem/mn.h>
/* Select the CPU family. */
/* Select the CPU family. */
#define INSTALL_FAMILY_10_SUPPORT FALSE #define INSTALL_FAMILY_10_SUPPORT FALSE
#define INSTALL_FAMILY_12_SUPPORT FALSE #define INSTALL_FAMILY_12_SUPPORT FALSE
#define INSTALL_FAMILY_14_SUPPORT FALSE #define INSTALL_FAMILY_14_SUPPORT FALSE
#define INSTALL_FAMILY_15_MODEL_1x_SUPPORT TRUE #define INSTALL_FAMILY_15_MODEL_1x_SUPPORT TRUE
/* Select the CPU socket type. */ /* Select the CPU socket type. */
#define INSTALL_G34_SOCKET_SUPPORT FALSE #define INSTALL_G34_SOCKET_SUPPORT FALSE
#define INSTALL_C32_SOCKET_SUPPORT FALSE #define INSTALL_C32_SOCKET_SUPPORT FALSE
#define INSTALL_S1G3_SOCKET_SUPPORT FALSE #define INSTALL_S1G3_SOCKET_SUPPORT FALSE
@ -156,7 +153,7 @@
#if CONFIG(GFXUMA) #if CONFIG(GFXUMA)
#define BLDCFG_UMA_ALIGNMENT UMA_4MB_ALIGNED #define BLDCFG_UMA_ALIGNMENT UMA_4MB_ALIGNED
#define BLDCFG_UMA_ALLOCATION_MODE UMA_SPECIFIED #define BLDCFG_UMA_ALLOCATION_MODE UMA_SPECIFIED
//#define BLDCFG_UMA_ALLOCATION_SIZE 0x1000//0x1800//0x1000 /* (1000 << 16) = 256M*/ //#define BLDCFG_UMA_ALLOCATION_SIZE 0x1000//0x1800//0x1000 /* (1000 << 16) = 256M */
#define BLDCFG_UMA_ALLOCATION_SIZE 0x2000//512M #define BLDCFG_UMA_ALLOCATION_SIZE 0x2000//512M
#define BLDCFG_UMA_ABOVE4G_SUPPORT FALSE #define BLDCFG_UMA_ABOVE4G_SUPPORT FALSE
#endif #endif
@ -168,7 +165,7 @@
//#define BLDCFG_IGPU_HD_AUDIO_SUBSYSTEM_ID OEM_IGPU_HD_AUDIO_SSID //#define BLDCFG_IGPU_HD_AUDIO_SUBSYSTEM_ID OEM_IGPU_HD_AUDIO_SSID
//#define BLFCFG_APU_PCIE_PORTS_SUBSYSTEM_ID OEM_APU_PCIE_PORTS_SSID //#define BLFCFG_APU_PCIE_PORTS_SUBSYSTEM_ID OEM_APU_PCIE_PORTS_SSID
/* Process the options... /* Process the options...
* This file include MUST occur AFTER the user option selection settings * This file include MUST occur AFTER the user option selection settings
*/ */
/* /*
@ -252,7 +249,7 @@ CONST AP_MTRR_SETTINGS ROMDATA TrinityApMtrrSettingsList[] =
#define DDR2400_FREQUENCY 1200 ///< DDR 2400 #define DDR2400_FREQUENCY 1200 ///< DDR 2400
#define UNSUPPORTED_DDR_FREQUENCY 1201 ///< Highest limit of DDR frequency #define UNSUPPORTED_DDR_FREQUENCY 1201 ///< Highest limit of DDR frequency
/* QUANDRANK_TYPE*/ /* QUANDRANK_TYPE */
#define QUADRANK_REGISTERED 0 ///< Quadrank registered DIMM #define QUADRANK_REGISTERED 0 ///< Quadrank registered DIMM
#define QUADRANK_UNBUFFERED 1 ///< Quadrank unbuffered DIMM #define QUADRANK_UNBUFFERED 1 ///< Quadrank unbuffered DIMM

8
src/mainboard/bap/ode_e20XX/buildOpts.c
View File

@ -9,7 +9,6 @@
* build option selections desired for that platform. * build option selections desired for that platform.
* *
* For Information about this file, see @ref platforminstall. * For Information about this file, see @ref platforminstall.
*
*/ */
#include <AGESA.h> #include <AGESA.h>
@ -29,7 +28,6 @@
#define INSTALL_AM3_SOCKET_SUPPORT FALSE #define INSTALL_AM3_SOCKET_SUPPORT FALSE
#define INSTALL_FM2_SOCKET_SUPPORT FALSE #define INSTALL_FM2_SOCKET_SUPPORT FALSE
#ifdef BLDOPT_REMOVE_FT3_SOCKET_SUPPORT #ifdef BLDOPT_REMOVE_FT3_SOCKET_SUPPORT
#if BLDOPT_REMOVE_FT3_SOCKET_SUPPORT == TRUE #if BLDOPT_REMOVE_FT3_SOCKET_SUPPORT == TRUE
#undef INSTALL_FT3_SOCKET_SUPPORT #undef INSTALL_FT3_SOCKET_SUPPORT
@ -152,7 +150,7 @@
#define BLDCFG_PROCESSOR_SCOPE_NAME1 '0' #define BLDCFG_PROCESSOR_SCOPE_NAME1 '0'
#define BLDCFG_PCIE_TRAINING_ALGORITHM PcieTrainingDistributed #define BLDCFG_PCIE_TRAINING_ALGORITHM PcieTrainingDistributed
/* Process the options... /* Process the options...
* This file include MUST occur AFTER the user option selection settings * This file include MUST occur AFTER the user option selection settings
*/ */
/* /*
@ -214,7 +212,7 @@ CONST AP_MTRR_SETTINGS ROMDATA KabiniApMtrrSettingsList[] =
#define BLDCFG_AP_MTRR_SETTINGS_LIST &KabiniApMtrrSettingsList #define BLDCFG_AP_MTRR_SETTINGS_LIST &KabiniApMtrrSettingsList
/* Include the files that instantiate the configuration definitions. */ /* Include the files that instantiate the configuration definitions. */
#include "cpuRegisters.h" #include "cpuRegisters.h"
#include "cpuFamRegisters.h" #include "cpuFamRegisters.h"
#include "cpuFamilyTranslation.h" #include "cpuFamilyTranslation.h"
@ -249,7 +247,7 @@ CONST AP_MTRR_SETTINGS ROMDATA KabiniApMtrrSettingsList[] =
//#define DDR2400_FREQUENCY 1200 ///< DDR 2400 //#define DDR2400_FREQUENCY 1200 ///< DDR 2400
//#define UNSUPPORTED_DDR_FREQUENCY 1201 ///< Highest limit of DDR frequency //#define UNSUPPORTED_DDR_FREQUENCY 1201 ///< Highest limit of DDR frequency
// //
///* QUANDRANK_TYPE*/ ///* QUANDRANK_TYPE */
//#define QUADRANK_REGISTERED 0 ///< Quadrank registered DIMM //#define QUADRANK_REGISTERED 0 ///< Quadrank registered DIMM
//#define QUADRANK_UNBUFFERED 1 ///< Quadrank unbuffered DIMM //#define QUADRANK_UNBUFFERED 1 ///< Quadrank unbuffered DIMM
// //

9
src/mainboard/biostar/a68n_5200/buildOpts.c
View File

@ -9,7 +9,6 @@
* build option selections desired for that platform. * build option selections desired for that platform.
* *
* For Information about this file, see @ref platforminstall. * For Information about this file, see @ref platforminstall.
*
*/ */
#include <AGESA.h> #include <AGESA.h>
@ -29,7 +28,6 @@
#define INSTALL_AM3_SOCKET_SUPPORT FALSE #define INSTALL_AM3_SOCKET_SUPPORT FALSE
#define INSTALL_FM2_SOCKET_SUPPORT FALSE #define INSTALL_FM2_SOCKET_SUPPORT FALSE
#ifdef BLDOPT_REMOVE_FT3_SOCKET_SUPPORT #ifdef BLDOPT_REMOVE_FT3_SOCKET_SUPPORT
#if BLDOPT_REMOVE_FT3_SOCKET_SUPPORT == TRUE #if BLDOPT_REMOVE_FT3_SOCKET_SUPPORT == TRUE
#undef INSTALL_FT3_SOCKET_SUPPORT #undef INSTALL_FT3_SOCKET_SUPPORT
@ -152,7 +150,7 @@
#define BLDCFG_PROCESSOR_SCOPE_NAME1 '0' #define BLDCFG_PROCESSOR_SCOPE_NAME1 '0'
#define BLDCFG_PCIE_TRAINING_ALGORITHM PcieTrainingDistributed #define BLDCFG_PCIE_TRAINING_ALGORITHM PcieTrainingDistributed
/* Process the options... /* Process the options...
* This file include MUST occur AFTER the user option selection settings * This file include MUST occur AFTER the user option selection settings
*/ */
/* /*
@ -214,8 +212,7 @@ CONST AP_MTRR_SETTINGS ROMDATA KabiniApMtrrSettingsList[] =
#define BLDCFG_AP_MTRR_SETTINGS_LIST &KabiniApMtrrSettingsList #define BLDCFG_AP_MTRR_SETTINGS_LIST &KabiniApMtrrSettingsList
/* Include the files that instantiate the configuration definitions. */
/* Include the files that instantiate the configuration definitions. */
#include "cpuRegisters.h" #include "cpuRegisters.h"
#include "cpuFamRegisters.h" #include "cpuFamRegisters.h"
#include "cpuFamilyTranslation.h" #include "cpuFamilyTranslation.h"
@ -250,7 +247,7 @@ CONST AP_MTRR_SETTINGS ROMDATA KabiniApMtrrSettingsList[] =
//#define DDR2400_FREQUENCY 1200 ///< DDR 2400 //#define DDR2400_FREQUENCY 1200 ///< DDR 2400
//#define UNSUPPORTED_DDR_FREQUENCY 1201 ///< Highest limit of DDR frequency //#define UNSUPPORTED_DDR_FREQUENCY 1201 ///< Highest limit of DDR frequency
// //
///* QUANDRANK_TYPE*/ ///* QUANDRANK_TYPE */
//#define QUADRANK_REGISTERED 0 ///< Quadrank registered DIMM //#define QUADRANK_REGISTERED 0 ///< Quadrank registered DIMM
//#define QUADRANK_UNBUFFERED 1 ///< Quadrank unbuffered DIMM //#define QUADRANK_UNBUFFERED 1 ///< Quadrank unbuffered DIMM
// //

9
src/mainboard/biostar/am1ml/buildOpts.c
View File

@ -9,7 +9,6 @@
* build option selections desired for that platform. * build option selections desired for that platform.
* *
* For Information about this file, see @ref platforminstall. * For Information about this file, see @ref platforminstall.
*
*/ */
#include <AGESA.h> #include <AGESA.h>
@ -29,7 +28,6 @@
#define INSTALL_AM3_SOCKET_SUPPORT FALSE #define INSTALL_AM3_SOCKET_SUPPORT FALSE
#define INSTALL_FM2_SOCKET_SUPPORT FALSE #define INSTALL_FM2_SOCKET_SUPPORT FALSE
#ifdef BLDOPT_REMOVE_FT3_SOCKET_SUPPORT #ifdef BLDOPT_REMOVE_FT3_SOCKET_SUPPORT
#if BLDOPT_REMOVE_FT3_SOCKET_SUPPORT == TRUE #if BLDOPT_REMOVE_FT3_SOCKET_SUPPORT == TRUE
#undef INSTALL_FT3_SOCKET_SUPPORT #undef INSTALL_FT3_SOCKET_SUPPORT
@ -152,7 +150,7 @@
#define BLDCFG_PROCESSOR_SCOPE_NAME1 '0' #define BLDCFG_PROCESSOR_SCOPE_NAME1 '0'
#define BLDCFG_PCIE_TRAINING_ALGORITHM PcieTrainingDistributed #define BLDCFG_PCIE_TRAINING_ALGORITHM PcieTrainingDistributed
/* Process the options... /* Process the options...
* This file include MUST occur AFTER the user option selection settings * This file include MUST occur AFTER the user option selection settings
*/ */
/* /*
@ -214,8 +212,7 @@ CONST AP_MTRR_SETTINGS ROMDATA KabiniApMtrrSettingsList[] =
#define BLDCFG_AP_MTRR_SETTINGS_LIST &KabiniApMtrrSettingsList #define BLDCFG_AP_MTRR_SETTINGS_LIST &KabiniApMtrrSettingsList
/* Include the files that instantiate the configuration definitions. */
/* Include the files that instantiate the configuration definitions. */
#include "cpuRegisters.h" #include "cpuRegisters.h"
#include "cpuFamRegisters.h" #include "cpuFamRegisters.h"
#include "cpuFamilyTranslation.h" #include "cpuFamilyTranslation.h"
@ -250,7 +247,7 @@ CONST AP_MTRR_SETTINGS ROMDATA KabiniApMtrrSettingsList[] =
//#define DDR2400_FREQUENCY 1200 ///< DDR 2400 //#define DDR2400_FREQUENCY 1200 ///< DDR 2400
//#define UNSUPPORTED_DDR_FREQUENCY 1201 ///< Highest limit of DDR frequency //#define UNSUPPORTED_DDR_FREQUENCY 1201 ///< Highest limit of DDR frequency
// //
///* QUANDRANK_TYPE*/ ///* QUANDRANK_TYPE */
//#define QUADRANK_REGISTERED 0 ///< Quadrank registered DIMM //#define QUADRANK_REGISTERED 0 ///< Quadrank registered DIMM
//#define QUADRANK_UNBUFFERED 1 ///< Quadrank unbuffered DIMM //#define QUADRANK_UNBUFFERED 1 ///< Quadrank unbuffered DIMM
// //

12
src/mainboard/elmex/pcm205400/buildOpts.c
View File

@ -9,18 +9,15 @@
* build option selections desired for that platform. * build option selections desired for that platform.
* *
* For Information about this file, see @ref platforminstall. * For Information about this file, see @ref platforminstall.
*
*/ */
/* Select the cpu family. */
/* Select the cpu family. */
#define INSTALL_FAMILY_10_SUPPORT FALSE #define INSTALL_FAMILY_10_SUPPORT FALSE
#define INSTALL_FAMILY_12_SUPPORT FALSE #define INSTALL_FAMILY_12_SUPPORT FALSE
#define INSTALL_FAMILY_14_SUPPORT TRUE #define INSTALL_FAMILY_14_SUPPORT TRUE
#define INSTALL_FAMILY_15_SUPPORT FALSE #define INSTALL_FAMILY_15_SUPPORT FALSE
/* Select the cpu socket type. */ /* Select the cpu socket type. */
#define INSTALL_G34_SOCKET_SUPPORT FALSE #define INSTALL_G34_SOCKET_SUPPORT FALSE
#define INSTALL_C32_SOCKET_SUPPORT FALSE #define INSTALL_C32_SOCKET_SUPPORT FALSE
#define INSTALL_S1G3_SOCKET_SUPPORT FALSE #define INSTALL_S1G3_SOCKET_SUPPORT FALSE
@ -85,7 +82,6 @@
#define BLDOPT_REMOVE_GFX_RECOVERY TRUE #define BLDOPT_REMOVE_GFX_RECOVERY TRUE
#define BLDOPT_REMOVE_EARLY_SAMPLES TRUE #define BLDOPT_REMOVE_EARLY_SAMPLES TRUE
#define BLDCFG_PCI_MMIO_BASE CONFIG_MMCONF_BASE_ADDRESS #define BLDCFG_PCI_MMIO_BASE CONFIG_MMCONF_BASE_ADDRESS
#define BLDCFG_PCI_MMIO_SIZE CONFIG_MMCONF_BUS_NUMBER #define BLDCFG_PCI_MMIO_SIZE CONFIG_MMCONF_BUS_NUMBER
@ -206,7 +202,7 @@ CONST AP_MTRR_SETTINGS ROMDATA OntarioApMtrrSettingsList[] =
{ CPU_LIST_TERMINAL } { CPU_LIST_TERMINAL }
}; };
/* Include the files that instantiate the configuration definitions. */ /* Include the files that instantiate the configuration definitions. */
#include "cpuRegisters.h" #include "cpuRegisters.h"
#include "cpuFamRegisters.h" #include "cpuFamRegisters.h"
@ -252,7 +248,7 @@ CONST AP_MTRR_SETTINGS ROMDATA OntarioApMtrrSettingsList[] =
#define DDR1866_FREQUENCY 933 ///< DDR 1866 #define DDR1866_FREQUENCY 933 ///< DDR 1866
#define UNSUPPORTED_DDR_FREQUENCY 934 ///< Highest limit of DDR frequency #define UNSUPPORTED_DDR_FREQUENCY 934 ///< Highest limit of DDR frequency
/* QUANDRANK_TYPE*/ /* QUANDRANK_TYPE */
#define QUADRANK_REGISTERED 0 ///< Quadrank registered DIMM #define QUADRANK_REGISTERED 0 ///< Quadrank registered DIMM
#define QUADRANK_UNBUFFERED 1 ///< Quadrank unbuffered DIMM #define QUADRANK_UNBUFFERED 1 ///< Quadrank unbuffered DIMM

13
src/mainboard/gizmosphere/gizmo/buildOpts.c
View File

@ -9,19 +9,15 @@
* build option selections desired for that platform. * build option selections desired for that platform.
* *
* For Information about this file, see @ref platforminstall. * For Information about this file, see @ref platforminstall.
*
*/ */
/* Select the CPU family. */
/* Select the CPU family. */
#define INSTALL_FAMILY_10_SUPPORT FALSE #define INSTALL_FAMILY_10_SUPPORT FALSE
#define INSTALL_FAMILY_12_SUPPORT FALSE #define INSTALL_FAMILY_12_SUPPORT FALSE
#define INSTALL_FAMILY_14_SUPPORT TRUE #define INSTALL_FAMILY_14_SUPPORT TRUE
#define INSTALL_FAMILY_15_SUPPORT FALSE #define INSTALL_FAMILY_15_SUPPORT FALSE
/* Select the CPU socket type. */ /* Select the CPU socket type. */
#define INSTALL_G34_SOCKET_SUPPORT FALSE #define INSTALL_G34_SOCKET_SUPPORT FALSE
#define INSTALL_C32_SOCKET_SUPPORT FALSE #define INSTALL_C32_SOCKET_SUPPORT FALSE
#define INSTALL_S1G3_SOCKET_SUPPORT FALSE #define INSTALL_S1G3_SOCKET_SUPPORT FALSE
@ -86,7 +82,6 @@
#define BLDOPT_REMOVE_GFX_RECOVERY TRUE #define BLDOPT_REMOVE_GFX_RECOVERY TRUE
#define BLDOPT_REMOVE_EARLY_SAMPLES TRUE #define BLDOPT_REMOVE_EARLY_SAMPLES TRUE
#define BLDCFG_PCI_MMIO_BASE CONFIG_MMCONF_BASE_ADDRESS #define BLDCFG_PCI_MMIO_BASE CONFIG_MMCONF_BASE_ADDRESS
#define BLDCFG_PCI_MMIO_SIZE CONFIG_MMCONF_BUS_NUMBER #define BLDCFG_PCI_MMIO_SIZE CONFIG_MMCONF_BUS_NUMBER
@ -207,7 +202,7 @@ CONST AP_MTRR_SETTINGS ROMDATA OntarioApMtrrSettingsList[] =
{ CPU_LIST_TERMINAL } { CPU_LIST_TERMINAL }
}; };
/* Include the files that instantiate the configuration definitions. */ /* Include the files that instantiate the configuration definitions. */
#include "cpuRegisters.h" #include "cpuRegisters.h"
#include "cpuFamRegisters.h" #include "cpuFamRegisters.h"
@ -253,7 +248,7 @@ CONST AP_MTRR_SETTINGS ROMDATA OntarioApMtrrSettingsList[] =
#define DDR1866_FREQUENCY 933 ///< DDR 1866 #define DDR1866_FREQUENCY 933 ///< DDR 1866
#define UNSUPPORTED_DDR_FREQUENCY 934 ///< Highest limit of DDR frequency #define UNSUPPORTED_DDR_FREQUENCY 934 ///< Highest limit of DDR frequency
/* QUANDRANK_TYPE*/ /* QUANDRANK_TYPE */
#define QUADRANK_REGISTERED 0 ///< Quadrank registered DIMM #define QUADRANK_REGISTERED 0 ///< Quadrank registered DIMM
#define QUADRANK_UNBUFFERED 1 ///< Quadrank unbuffered DIMM #define QUADRANK_UNBUFFERED 1 ///< Quadrank unbuffered DIMM

8
src/mainboard/gizmosphere/gizmo2/buildOpts.c
View File

@ -9,7 +9,6 @@
* build option selections desired for that platform. * build option selections desired for that platform.
* *
* For Information about this file, see @ref platforminstall. * For Information about this file, see @ref platforminstall.
*
*/ */
#include <AGESA.h> #include <AGESA.h>
@ -29,7 +28,6 @@
#define INSTALL_AM3_SOCKET_SUPPORT FALSE #define INSTALL_AM3_SOCKET_SUPPORT FALSE
#define INSTALL_FM2_SOCKET_SUPPORT FALSE #define INSTALL_FM2_SOCKET_SUPPORT FALSE
#ifdef BLDOPT_REMOVE_FT3_SOCKET_SUPPORT #ifdef BLDOPT_REMOVE_FT3_SOCKET_SUPPORT
#if BLDOPT_REMOVE_FT3_SOCKET_SUPPORT == TRUE #if BLDOPT_REMOVE_FT3_SOCKET_SUPPORT == TRUE
#undef INSTALL_FT3_SOCKET_SUPPORT #undef INSTALL_FT3_SOCKET_SUPPORT
@ -152,7 +150,7 @@
#define BLDCFG_PROCESSOR_SCOPE_NAME1 '0' #define BLDCFG_PROCESSOR_SCOPE_NAME1 '0'
#define BLDCFG_PCIE_TRAINING_ALGORITHM PcieTrainingDistributed #define BLDCFG_PCIE_TRAINING_ALGORITHM PcieTrainingDistributed
/* Process the options... /* Process the options...
* This file include MUST occur AFTER the user option selection settings * This file include MUST occur AFTER the user option selection settings
*/ */
/* /*
@ -214,7 +212,7 @@ CONST AP_MTRR_SETTINGS ROMDATA KabiniApMtrrSettingsList[] =
#define BLDCFG_AP_MTRR_SETTINGS_LIST &KabiniApMtrrSettingsList #define BLDCFG_AP_MTRR_SETTINGS_LIST &KabiniApMtrrSettingsList
/* Include the files that instantiate the configuration definitions. */ /* Include the files that instantiate the configuration definitions. */
#include "cpuRegisters.h" #include "cpuRegisters.h"
#include "cpuFamRegisters.h" #include "cpuFamRegisters.h"
#include "cpuFamilyTranslation.h" #include "cpuFamilyTranslation.h"
@ -249,7 +247,7 @@ CONST AP_MTRR_SETTINGS ROMDATA KabiniApMtrrSettingsList[] =
//#define DDR2400_FREQUENCY 1200 ///< DDR 2400 //#define DDR2400_FREQUENCY 1200 ///< DDR 2400
//#define UNSUPPORTED_DDR_FREQUENCY 1201 ///< Highest limit of DDR frequency //#define UNSUPPORTED_DDR_FREQUENCY 1201 ///< Highest limit of DDR frequency
// //
///* QUANDRANK_TYPE*/ ///* QUANDRANK_TYPE */
//#define QUADRANK_REGISTERED 0 ///< Quadrank registered DIMM //#define QUADRANK_REGISTERED 0 ///< Quadrank registered DIMM
//#define QUADRANK_UNBUFFERED 1 ///< Quadrank unbuffered DIMM //#define QUADRANK_UNBUFFERED 1 ///< Quadrank unbuffered DIMM
// //

8
src/mainboard/hp/abm/buildOpts.c
View File

@ -33,7 +33,6 @@
#define INSTALL_AM3_SOCKET_SUPPORT FALSE #define INSTALL_AM3_SOCKET_SUPPORT FALSE
#define INSTALL_FM2_SOCKET_SUPPORT FALSE #define INSTALL_FM2_SOCKET_SUPPORT FALSE
#ifdef BLDOPT_REMOVE_FT3_SOCKET_SUPPORT #ifdef BLDOPT_REMOVE_FT3_SOCKET_SUPPORT
#if BLDOPT_REMOVE_FT3_SOCKET_SUPPORT == TRUE #if BLDOPT_REMOVE_FT3_SOCKET_SUPPORT == TRUE
#undef INSTALL_FT3_SOCKET_SUPPORT #undef INSTALL_FT3_SOCKET_SUPPORT
@ -156,7 +155,7 @@
#define BLDCFG_PROCESSOR_SCOPE_NAME1 '0' #define BLDCFG_PROCESSOR_SCOPE_NAME1 '0'
#define BLDCFG_PCIE_TRAINING_ALGORITHM PcieTrainingDistributed #define BLDCFG_PCIE_TRAINING_ALGORITHM PcieTrainingDistributed
/* Process the options... /* Process the options...
* This file include MUST occur AFTER the user option selection settings * This file include MUST occur AFTER the user option selection settings
*/ */
/* /*
@ -218,8 +217,7 @@ CONST AP_MTRR_SETTINGS ROMDATA KabiniApMtrrSettingsList[] =
#define BLDCFG_AP_MTRR_SETTINGS_LIST &KabiniApMtrrSettingsList #define BLDCFG_AP_MTRR_SETTINGS_LIST &KabiniApMtrrSettingsList
/* Include the files that instantiate the configuration definitions. */
/* Include the files that instantiate the configuration definitions. */
#include "cpuRegisters.h" #include "cpuRegisters.h"
#include "cpuFamRegisters.h" #include "cpuFamRegisters.h"
#include "cpuFamilyTranslation.h" #include "cpuFamilyTranslation.h"
@ -254,7 +252,7 @@ CONST AP_MTRR_SETTINGS ROMDATA KabiniApMtrrSettingsList[] =
//#define DDR2400_FREQUENCY 1200 ///< DDR 2400 //#define DDR2400_FREQUENCY 1200 ///< DDR 2400
//#define UNSUPPORTED_DDR_FREQUENCY 1201 ///< Highest limit of DDR frequency //#define UNSUPPORTED_DDR_FREQUENCY 1201 ///< Highest limit of DDR frequency
// //
///* QUANDRANK_TYPE*/ ///* QUANDRANK_TYPE */
//#define QUADRANK_REGISTERED 0 ///< Quadrank registered DIMM //#define QUADRANK_REGISTERED 0 ///< Quadrank registered DIMM
//#define QUADRANK_UNBUFFERED 1 ///< Quadrank unbuffered DIMM //#define QUADRANK_UNBUFFERED 1 ///< Quadrank unbuffered DIMM
// //

16
src/mainboard/hp/pavilion_m6_1035dx/buildOpts.c
View File

@ -9,15 +9,13 @@
* build option selections desired for that platform. * build option selections desired for that platform.
* *
* For Information about this file, see @ref platforminstall. * For Information about this file, see @ref platforminstall.
*
*/ */
#include "mainboard.h" #include "mainboard.h"
#include <vendorcode/amd/agesa/f15tn/AGESA.h> #include <vendorcode/amd/agesa/f15tn/AGESA.h>
/* Include the files that instantiate the configuration definitions. */ /* Include the files that instantiate the configuration definitions. */
#include <vendorcode/amd/agesa/f15tn/Include/AdvancedApi.h> #include <vendorcode/amd/agesa/f15tn/Include/AdvancedApi.h>
#include <vendorcode/amd/agesa/f15tn/Proc/CPU/cpuFamilyTranslation.h> #include <vendorcode/amd/agesa/f15tn/Proc/CPU/cpuFamilyTranslation.h>
#include <vendorcode/amd/agesa/f15tn/Proc/CPU/Feature/cpuFeatures.h> #include <vendorcode/amd/agesa/f15tn/Proc/CPU/Feature/cpuFeatures.h>
@ -29,14 +27,13 @@
#include <vendorcode/amd/agesa/f15tn/Proc/Mem/mm.h> #include <vendorcode/amd/agesa/f15tn/Proc/Mem/mm.h>
#include <vendorcode/amd/agesa/f15tn/Proc/Mem/mn.h> #include <vendorcode/amd/agesa/f15tn/Proc/Mem/mn.h>
/* Select the CPU family. */
/* Select the CPU family. */
#define INSTALL_FAMILY_10_SUPPORT FALSE #define INSTALL_FAMILY_10_SUPPORT FALSE
#define INSTALL_FAMILY_12_SUPPORT FALSE #define INSTALL_FAMILY_12_SUPPORT FALSE
#define INSTALL_FAMILY_14_SUPPORT FALSE #define INSTALL_FAMILY_14_SUPPORT FALSE
#define INSTALL_FAMILY_15_MODEL_1x_SUPPORT TRUE #define INSTALL_FAMILY_15_MODEL_1x_SUPPORT TRUE
/* Select the CPU socket type. */ /* Select the CPU socket type. */
#define INSTALL_G34_SOCKET_SUPPORT FALSE #define INSTALL_G34_SOCKET_SUPPORT FALSE
#define INSTALL_C32_SOCKET_SUPPORT FALSE #define INSTALL_C32_SOCKET_SUPPORT FALSE
#define INSTALL_S1G3_SOCKET_SUPPORT FALSE #define INSTALL_S1G3_SOCKET_SUPPORT FALSE
@ -157,7 +154,7 @@
#if CONFIG(GFXUMA) #if CONFIG(GFXUMA)
#define BLDCFG_UMA_ALIGNMENT UMA_4MB_ALIGNED #define BLDCFG_UMA_ALIGNMENT UMA_4MB_ALIGNED
#define BLDCFG_UMA_ALLOCATION_MODE UMA_SPECIFIED #define BLDCFG_UMA_ALLOCATION_MODE UMA_SPECIFIED
//#define BLDCFG_UMA_ALLOCATION_SIZE 0x1000//0x1800//0x1000 /* (1000 << 16) = 256M*/ //#define BLDCFG_UMA_ALLOCATION_SIZE 0x1000//0x1800//0x1000 /* (1000 << 16) = 256M */
#define BLDCFG_UMA_ALLOCATION_SIZE 0x2000//512M #define BLDCFG_UMA_ALLOCATION_SIZE 0x2000//512M
#define BLDCFG_UMA_ABOVE4G_SUPPORT FALSE #define BLDCFG_UMA_ABOVE4G_SUPPORT FALSE
#endif #endif
@ -169,7 +166,7 @@
//#define BLDCFG_IGPU_HD_AUDIO_SUBSYSTEM_ID OEM_IGPU_HD_AUDIO_SSID //#define BLDCFG_IGPU_HD_AUDIO_SUBSYSTEM_ID OEM_IGPU_HD_AUDIO_SSID
//#define BLFCFG_APU_PCIE_PORTS_SUBSYSTEM_ID OEM_APU_PCIE_PORTS_SSID //#define BLFCFG_APU_PCIE_PORTS_SUBSYSTEM_ID OEM_APU_PCIE_PORTS_SSID
/* Process the options... /* Process the options...
* This file include MUST occur AFTER the user option selection settings * This file include MUST occur AFTER the user option selection settings
*/ */
/* /*
@ -253,7 +250,7 @@ CONST AP_MTRR_SETTINGS ROMDATA TrinityApMtrrSettingsList[] =
#define DDR2400_FREQUENCY 1200 ///< DDR 2400 #define DDR2400_FREQUENCY 1200 ///< DDR 2400
#define UNSUPPORTED_DDR_FREQUENCY 1201 ///< Highest limit of DDR frequency #define UNSUPPORTED_DDR_FREQUENCY 1201 ///< Highest limit of DDR frequency
/* QUANDRANK_TYPE*/ /* QUANDRANK_TYPE */
#define QUADRANK_REGISTERED 0 ///< Quadrank registered DIMM #define QUADRANK_REGISTERED 0 ///< Quadrank registered DIMM
#define QUADRANK_UNBUFFERED 1 ///< Quadrank unbuffered DIMM #define QUADRANK_UNBUFFERED 1 ///< Quadrank unbuffered DIMM
@ -339,7 +336,6 @@ GPIO_CONTROL pavilion_m6_1035dx_gpio[] = {
}; };
#define BLDCFG_FCH_GPIO_CONTROL_LIST (&pavilion_m6_1035dx_gpio[0]) #define BLDCFG_FCH_GPIO_CONTROL_LIST (&pavilion_m6_1035dx_gpio[0])
/* These definitions could be moved to a common Hudson header, should we decide /* These definitions could be moved to a common Hudson header, should we decide
* to provide our own, saner SCI mapping function * to provide our own, saner SCI mapping function
*/ */

6
src/mainboard/jetway/nf81-t56n-lf/buildOpts.c
View File

@ -9,10 +9,8 @@
* build option selections desired for that platform. * build option selections desired for that platform.
* *
* For Information about this file, see @ref platforminstall. * For Information about this file, see @ref platforminstall.
*
*/ */
#include <vendorcode/amd/agesa/f14/AGESA.h> #include <vendorcode/amd/agesa/f14/AGESA.h>
/* Include the files that instantiate the configuration definitions. */ /* Include the files that instantiate the configuration definitions. */
@ -27,7 +25,6 @@
#include <vendorcode/amd/agesa/f14/Proc/Mem/mm.h> #include <vendorcode/amd/agesa/f14/Proc/Mem/mm.h>
#include <vendorcode/amd/agesa/f14/Proc/Mem/mn.h> #include <vendorcode/amd/agesa/f14/Proc/Mem/mn.h>
/* Select the CPU family. */ /* Select the CPU family. */
#define INSTALL_FAMILY_10_SUPPORT FALSE #define INSTALL_FAMILY_10_SUPPORT FALSE
#define INSTALL_FAMILY_12_SUPPORT FALSE #define INSTALL_FAMILY_12_SUPPORT FALSE
@ -99,7 +96,6 @@
#define BLDOPT_REMOVE_GFX_RECOVERY TRUE #define BLDOPT_REMOVE_GFX_RECOVERY TRUE
#define BLDOPT_REMOVE_EARLY_SAMPLES TRUE #define BLDOPT_REMOVE_EARLY_SAMPLES TRUE
#define BLDCFG_PCI_MMIO_BASE CONFIG_MMCONF_BASE_ADDRESS #define BLDCFG_PCI_MMIO_BASE CONFIG_MMCONF_BASE_ADDRESS
#define BLDCFG_PCI_MMIO_SIZE CONFIG_MMCONF_BUS_NUMBER #define BLDCFG_PCI_MMIO_SIZE CONFIG_MMCONF_BUS_NUMBER
@ -255,7 +251,7 @@ const AP_MTRR_SETTINGS ROMDATA OntarioApMtrrSettingsList[] =
#define DDR1866_FREQUENCY 933 /**< DDR 1866 */ #define DDR1866_FREQUENCY 933 /**< DDR 1866 */
#define UNSUPPORTED_DDR_FREQUENCY 934 /**< Max limit of DDR frequency */ #define UNSUPPORTED_DDR_FREQUENCY 934 /**< Max limit of DDR frequency */
/* QUANDRANK_TYPE*/ /* QUANDRANK_TYPE */
#define QUADRANK_REGISTERED 0 /**< Quadrank registered DIMM */ #define QUADRANK_REGISTERED 0 /**< Quadrank registered DIMM */
#define QUADRANK_UNBUFFERED 1 /**< Quadrank unbuffered DIMM */ #define QUADRANK_UNBUFFERED 1 /**< Quadrank unbuffered DIMM */

8
src/mainboard/lenovo/g505s/buildOpts.c
View File

@ -9,12 +9,10 @@
* build option selections desired for that platform. * build option selections desired for that platform.
* *
* For Information about this file, see @ref platforminstall. * For Information about this file, see @ref platforminstall.
*
*/ */
#include "mainboard.h" #include "mainboard.h"
#include <vendorcode/amd/agesa/f15tn/AGESA.h> #include <vendorcode/amd/agesa/f15tn/AGESA.h>
/* Include the files that instantiate the configuration definitions. */ /* Include the files that instantiate the configuration definitions. */
@ -29,7 +27,6 @@
#include <vendorcode/amd/agesa/f15tn/Proc/Mem/mm.h> #include <vendorcode/amd/agesa/f15tn/Proc/Mem/mm.h>
#include <vendorcode/amd/agesa/f15tn/Proc/Mem/mn.h> #include <vendorcode/amd/agesa/f15tn/Proc/Mem/mn.h>
/* Select the CPU family. */ /* Select the CPU family. */
#define INSTALL_FAMILY_10_SUPPORT FALSE #define INSTALL_FAMILY_10_SUPPORT FALSE
#define INSTALL_FAMILY_12_SUPPORT FALSE #define INSTALL_FAMILY_12_SUPPORT FALSE
@ -157,7 +154,7 @@
#if CONFIG(GFXUMA) #if CONFIG(GFXUMA)
#define BLDCFG_UMA_ALIGNMENT UMA_4MB_ALIGNED #define BLDCFG_UMA_ALIGNMENT UMA_4MB_ALIGNED
#define BLDCFG_UMA_ALLOCATION_MODE UMA_SPECIFIED #define BLDCFG_UMA_ALLOCATION_MODE UMA_SPECIFIED
//#define BLDCFG_UMA_ALLOCATION_SIZE 0x1000//0x1800//0x1000 /* (1000 << 16) = 256M*/ //#define BLDCFG_UMA_ALLOCATION_SIZE 0x1000//0x1800//0x1000 /* (1000 << 16) = 256M */
#define BLDCFG_UMA_ALLOCATION_SIZE 0x2000//512M #define BLDCFG_UMA_ALLOCATION_SIZE 0x2000//512M
#define BLDCFG_UMA_ABOVE4G_SUPPORT FALSE #define BLDCFG_UMA_ABOVE4G_SUPPORT FALSE
#endif #endif
@ -253,7 +250,7 @@ CONST AP_MTRR_SETTINGS ROMDATA TrinityApMtrrSettingsList[] =
#define DDR2400_FREQUENCY 1200 ///< DDR 2400 #define DDR2400_FREQUENCY 1200 ///< DDR 2400
#define UNSUPPORTED_DDR_FREQUENCY 1201 ///< Highest limit of DDR frequency #define UNSUPPORTED_DDR_FREQUENCY 1201 ///< Highest limit of DDR frequency
/* QUANDRANK_TYPE*/ /* QUANDRANK_TYPE */
#define QUADRANK_REGISTERED 0 ///< Quadrank registered DIMM #define QUADRANK_REGISTERED 0 ///< Quadrank registered DIMM
#define QUADRANK_UNBUFFERED 1 ///< Quadrank unbuffered DIMM #define QUADRANK_UNBUFFERED 1 ///< Quadrank unbuffered DIMM
@ -339,7 +336,6 @@ GPIO_CONTROL lenovo_g505s_gpio[] = {
}; };
#define BLDCFG_FCH_GPIO_CONTROL_LIST (&lenovo_g505s_gpio[0]) #define BLDCFG_FCH_GPIO_CONTROL_LIST (&lenovo_g505s_gpio[0])
/* These definitions could be moved to a common Hudson header, should we decide /* These definitions could be moved to a common Hudson header, should we decide
* to provide our own, saner SCI mapping function * to provide our own, saner SCI mapping function
*/ */

13
src/mainboard/lippert/frontrunner-af/buildOpts.c
View File

@ -9,19 +9,15 @@
* build option selections desired for that platform. * build option selections desired for that platform.
* *
* For Information about this file, see @ref platforminstall. * For Information about this file, see @ref platforminstall.
*
*/ */
/* Select the CPU family. */
/* Select the CPU family. */
#define INSTALL_FAMILY_10_SUPPORT FALSE #define INSTALL_FAMILY_10_SUPPORT FALSE
#define INSTALL_FAMILY_12_SUPPORT FALSE #define INSTALL_FAMILY_12_SUPPORT FALSE
#define INSTALL_FAMILY_14_SUPPORT TRUE #define INSTALL_FAMILY_14_SUPPORT TRUE
#define INSTALL_FAMILY_15_SUPPORT FALSE #define INSTALL_FAMILY_15_SUPPORT FALSE
/* Select the CPU socket type. */ /* Select the CPU socket type. */
#define INSTALL_G34_SOCKET_SUPPORT FALSE #define INSTALL_G34_SOCKET_SUPPORT FALSE
#define INSTALL_C32_SOCKET_SUPPORT FALSE #define INSTALL_C32_SOCKET_SUPPORT FALSE
#define INSTALL_S1G3_SOCKET_SUPPORT FALSE #define INSTALL_S1G3_SOCKET_SUPPORT FALSE
@ -86,7 +82,6 @@
#define BLDOPT_REMOVE_GFX_RECOVERY TRUE #define BLDOPT_REMOVE_GFX_RECOVERY TRUE
#define BLDOPT_REMOVE_EARLY_SAMPLES TRUE #define BLDOPT_REMOVE_EARLY_SAMPLES TRUE
#define BLDCFG_PCI_MMIO_BASE CONFIG_MMCONF_BASE_ADDRESS #define BLDCFG_PCI_MMIO_BASE CONFIG_MMCONF_BASE_ADDRESS
#define BLDCFG_PCI_MMIO_SIZE CONFIG_MMCONF_BUS_NUMBER #define BLDCFG_PCI_MMIO_SIZE CONFIG_MMCONF_BUS_NUMBER
@ -207,7 +202,7 @@ CONST AP_MTRR_SETTINGS ROMDATA OntarioApMtrrSettingsList[] =
{ CPU_LIST_TERMINAL } { CPU_LIST_TERMINAL }
}; };
/* Include the files that instantiate the configuration definitions. */ /* Include the files that instantiate the configuration definitions. */
#include "cpuRegisters.h" #include "cpuRegisters.h"
#include "cpuFamRegisters.h" #include "cpuFamRegisters.h"
@ -253,7 +248,7 @@ CONST AP_MTRR_SETTINGS ROMDATA OntarioApMtrrSettingsList[] =
#define DDR1866_FREQUENCY 933 ///< DDR 1866 #define DDR1866_FREQUENCY 933 ///< DDR 1866
#define UNSUPPORTED_DDR_FREQUENCY 934 ///< Highest limit of DDR frequency #define UNSUPPORTED_DDR_FREQUENCY 934 ///< Highest limit of DDR frequency
/* QUANDRANK_TYPE*/ /* QUANDRANK_TYPE */
#define QUADRANK_REGISTERED 0 ///< Quadrank registered DIMM #define QUADRANK_REGISTERED 0 ///< Quadrank registered DIMM
#define QUADRANK_UNBUFFERED 1 ///< Quadrank unbuffered DIMM #define QUADRANK_UNBUFFERED 1 ///< Quadrank unbuffered DIMM

13
src/mainboard/lippert/toucan-af/buildOpts.c
View File

@ -9,19 +9,15 @@
* build option selections desired for that platform. * build option selections desired for that platform.
* *
* For Information about this file, see @ref platforminstall. * For Information about this file, see @ref platforminstall.
*
*/ */
/* Select the CPU family. */
/* Select the CPU family. */
#define INSTALL_FAMILY_10_SUPPORT FALSE #define INSTALL_FAMILY_10_SUPPORT FALSE
#define INSTALL_FAMILY_12_SUPPORT FALSE #define INSTALL_FAMILY_12_SUPPORT FALSE
#define INSTALL_FAMILY_14_SUPPORT TRUE #define INSTALL_FAMILY_14_SUPPORT TRUE
#define INSTALL_FAMILY_15_SUPPORT FALSE #define INSTALL_FAMILY_15_SUPPORT FALSE
/* Select the CPU socket type. */ /* Select the CPU socket type. */
#define INSTALL_G34_SOCKET_SUPPORT FALSE #define INSTALL_G34_SOCKET_SUPPORT FALSE
#define INSTALL_C32_SOCKET_SUPPORT FALSE #define INSTALL_C32_SOCKET_SUPPORT FALSE
#define INSTALL_S1G3_SOCKET_SUPPORT FALSE #define INSTALL_S1G3_SOCKET_SUPPORT FALSE
@ -86,7 +82,6 @@
#define BLDOPT_REMOVE_GFX_RECOVERY TRUE #define BLDOPT_REMOVE_GFX_RECOVERY TRUE
#define BLDOPT_REMOVE_EARLY_SAMPLES TRUE #define BLDOPT_REMOVE_EARLY_SAMPLES TRUE
#define BLDCFG_PCI_MMIO_BASE CONFIG_MMCONF_BASE_ADDRESS #define BLDCFG_PCI_MMIO_BASE CONFIG_MMCONF_BASE_ADDRESS
#define BLDCFG_PCI_MMIO_SIZE CONFIG_MMCONF_BUS_NUMBER #define BLDCFG_PCI_MMIO_SIZE CONFIG_MMCONF_BUS_NUMBER
@ -207,7 +202,7 @@ CONST AP_MTRR_SETTINGS ROMDATA OntarioApMtrrSettingsList[] =
{ CPU_LIST_TERMINAL } { CPU_LIST_TERMINAL }
}; };
/* Include the files that instantiate the configuration definitions. */ /* Include the files that instantiate the configuration definitions. */
#include "cpuRegisters.h" #include "cpuRegisters.h"
#include "cpuFamRegisters.h" #include "cpuFamRegisters.h"
@ -253,7 +248,7 @@ CONST AP_MTRR_SETTINGS ROMDATA OntarioApMtrrSettingsList[] =
#define DDR1866_FREQUENCY 933 ///< DDR 1866 #define DDR1866_FREQUENCY 933 ///< DDR 1866
#define UNSUPPORTED_DDR_FREQUENCY 934 ///< Highest limit of DDR frequency #define UNSUPPORTED_DDR_FREQUENCY 934 ///< Highest limit of DDR frequency
/* QUANDRANK_TYPE*/ /* QUANDRANK_TYPE */
#define QUADRANK_REGISTERED 0 ///< Quadrank registered DIMM #define QUADRANK_REGISTERED 0 ///< Quadrank registered DIMM
#define QUADRANK_UNBUFFERED 1 ///< Quadrank unbuffered DIMM #define QUADRANK_UNBUFFERED 1 ///< Quadrank unbuffered DIMM

15
src/mainboard/msi/ms7721/buildOpts.c
View File

@ -9,13 +9,11 @@
* build option selections desired for that platform. * build option selections desired for that platform.
* *
* For Information about this file, see @ref platforminstall. * For Information about this file, see @ref platforminstall.
*
*/ */
#include <vendorcode/amd/agesa/f15tn/AGESA.h> #include <vendorcode/amd/agesa/f15tn/AGESA.h>
/* Include the files that instantiate the configuration definitions. */ /* Include the files that instantiate the configuration definitions. */
#include <vendorcode/amd/agesa/f15tn/Include/AdvancedApi.h> #include <vendorcode/amd/agesa/f15tn/Include/AdvancedApi.h>
#include <vendorcode/amd/agesa/f15tn/Proc/CPU/cpuFamilyTranslation.h> #include <vendorcode/amd/agesa/f15tn/Proc/CPU/cpuFamilyTranslation.h>
#include <vendorcode/amd/agesa/f15tn/Proc/CPU/Feature/cpuFeatures.h> #include <vendorcode/amd/agesa/f15tn/Proc/CPU/Feature/cpuFeatures.h>
@ -27,14 +25,13 @@
#include <vendorcode/amd/agesa/f15tn/Proc/Mem/mm.h> #include <vendorcode/amd/agesa/f15tn/Proc/Mem/mm.h>
#include <vendorcode/amd/agesa/f15tn/Proc/Mem/mn.h> #include <vendorcode/amd/agesa/f15tn/Proc/Mem/mn.h>
/* Select the CPU family. */
/* Select the CPU family. */
#define INSTALL_FAMILY_10_SUPPORT FALSE #define INSTALL_FAMILY_10_SUPPORT FALSE
#define INSTALL_FAMILY_12_SUPPORT FALSE #define INSTALL_FAMILY_12_SUPPORT FALSE
#define INSTALL_FAMILY_14_SUPPORT FALSE #define INSTALL_FAMILY_14_SUPPORT FALSE
#define INSTALL_FAMILY_15_MODEL_1x_SUPPORT TRUE #define INSTALL_FAMILY_15_MODEL_1x_SUPPORT TRUE
/* Select the CPU socket type. */ /* Select the CPU socket type. */
#define INSTALL_G34_SOCKET_SUPPORT FALSE #define INSTALL_G34_SOCKET_SUPPORT FALSE
#define INSTALL_C32_SOCKET_SUPPORT FALSE #define INSTALL_C32_SOCKET_SUPPORT FALSE
#define INSTALL_S1G3_SOCKET_SUPPORT FALSE #define INSTALL_S1G3_SOCKET_SUPPORT FALSE
@ -156,7 +153,7 @@
#if CONFIG(GFXUMA) #if CONFIG(GFXUMA)
#define BLDCFG_UMA_ALIGNMENT UMA_4MB_ALIGNED #define BLDCFG_UMA_ALIGNMENT UMA_4MB_ALIGNED
#define BLDCFG_UMA_ALLOCATION_MODE UMA_SPECIFIED #define BLDCFG_UMA_ALLOCATION_MODE UMA_SPECIFIED
//#define BLDCFG_UMA_ALLOCATION_SIZE 0x1000//0x1800//0x1000 /* (1000 << 16) = 256M*/ //#define BLDCFG_UMA_ALLOCATION_SIZE 0x1000//0x1800//0x1000 /* (1000 << 16) = 256M */
#define BLDCFG_UMA_ALLOCATION_SIZE 0x2000//512M #define BLDCFG_UMA_ALLOCATION_SIZE 0x2000//512M
#define BLDCFG_UMA_ABOVE4G_SUPPORT FALSE #define BLDCFG_UMA_ABOVE4G_SUPPORT FALSE
#endif #endif
@ -168,7 +165,7 @@
//#define BLDCFG_IGPU_HD_AUDIO_SUBSYSTEM_ID OEM_IGPU_HD_AUDIO_SSID //#define BLDCFG_IGPU_HD_AUDIO_SUBSYSTEM_ID OEM_IGPU_HD_AUDIO_SSID
//#define BLFCFG_APU_PCIE_PORTS_SUBSYSTEM_ID OEM_APU_PCIE_PORTS_SSID //#define BLFCFG_APU_PCIE_PORTS_SUBSYSTEM_ID OEM_APU_PCIE_PORTS_SSID
/* Process the options... /* Process the options...
* This file include MUST occur AFTER the user option selection settings * This file include MUST occur AFTER the user option selection settings
*/ */
/* /*
@ -252,7 +249,7 @@ CONST AP_MTRR_SETTINGS ROMDATA TrinityApMtrrSettingsList[] =
#define DDR2400_FREQUENCY 1200 ///< DDR 2400 #define DDR2400_FREQUENCY 1200 ///< DDR 2400
#define UNSUPPORTED_DDR_FREQUENCY 1201 ///< Highest limit of DDR frequency #define UNSUPPORTED_DDR_FREQUENCY 1201 ///< Highest limit of DDR frequency
/* QUANDRANK_TYPE*/ /* QUANDRANK_TYPE */
#define QUADRANK_REGISTERED 0 ///< Quadrank registered DIMM #define QUADRANK_REGISTERED 0 ///< Quadrank registered DIMM
#define QUADRANK_UNBUFFERED 1 ///< Quadrank unbuffered DIMM #define QUADRANK_UNBUFFERED 1 ///< Quadrank unbuffered DIMM

12
src/mainboard/pcengines/apu1/buildOpts.c
View File

@ -9,18 +9,15 @@
* build option selections desired for that platform. * build option selections desired for that platform.
* *
* For Information about this file, see @ref platforminstall. * For Information about this file, see @ref platforminstall.
*
*/ */
/* Select the CPU family. */
/* Select the CPU family. */
#define INSTALL_FAMILY_10_SUPPORT FALSE #define INSTALL_FAMILY_10_SUPPORT FALSE
#define INSTALL_FAMILY_12_SUPPORT FALSE #define INSTALL_FAMILY_12_SUPPORT FALSE
#define INSTALL_FAMILY_14_SUPPORT TRUE #define INSTALL_FAMILY_14_SUPPORT TRUE
#define INSTALL_FAMILY_15_SUPPORT FALSE #define INSTALL_FAMILY_15_SUPPORT FALSE
/* Select the CPU socket type. */ /* Select the CPU socket type. */
#define INSTALL_G34_SOCKET_SUPPORT FALSE #define INSTALL_G34_SOCKET_SUPPORT FALSE
#define INSTALL_C32_SOCKET_SUPPORT FALSE #define INSTALL_C32_SOCKET_SUPPORT FALSE
#define INSTALL_S1G3_SOCKET_SUPPORT FALSE #define INSTALL_S1G3_SOCKET_SUPPORT FALSE
@ -85,7 +82,6 @@
#define BLDOPT_REMOVE_GFX_RECOVERY TRUE #define BLDOPT_REMOVE_GFX_RECOVERY TRUE
#define BLDOPT_REMOVE_EARLY_SAMPLES TRUE #define BLDOPT_REMOVE_EARLY_SAMPLES TRUE
#define BLDCFG_PCI_MMIO_BASE CONFIG_MMCONF_BASE_ADDRESS #define BLDCFG_PCI_MMIO_BASE CONFIG_MMCONF_BASE_ADDRESS
#define BLDCFG_PCI_MMIO_SIZE CONFIG_MMCONF_BUS_NUMBER #define BLDCFG_PCI_MMIO_SIZE CONFIG_MMCONF_BUS_NUMBER
@ -206,7 +202,7 @@ CONST AP_MTRR_SETTINGS ROMDATA OntarioApMtrrSettingsList[] =
{ CPU_LIST_TERMINAL } { CPU_LIST_TERMINAL }
}; };
/* Include the files that instantiate the configuration definitions. */ /* Include the files that instantiate the configuration definitions. */
#include "cpuRegisters.h" #include "cpuRegisters.h"
#include "cpuFamRegisters.h" #include "cpuFamRegisters.h"
@ -252,7 +248,7 @@ CONST AP_MTRR_SETTINGS ROMDATA OntarioApMtrrSettingsList[] =
#define DDR1866_FREQUENCY 933 ///< DDR 1866 #define DDR1866_FREQUENCY 933 ///< DDR 1866
#define UNSUPPORTED_DDR_FREQUENCY 934 ///< Highest limit of DDR frequency #define UNSUPPORTED_DDR_FREQUENCY 934 ///< Highest limit of DDR frequency
/* QUANDRANK_TYPE*/ /* QUANDRANK_TYPE */
#define QUADRANK_REGISTERED 0 ///< Quadrank registered DIMM #define QUADRANK_REGISTERED 0 ///< Quadrank registered DIMM
#define QUADRANK_UNBUFFERED 1 ///< Quadrank unbuffered DIMM #define QUADRANK_UNBUFFERED 1 ///< Quadrank unbuffered DIMM