mb/*/*/buildOpts.c: Clean up whitespace

Drop multiple blank lines and use one space inside C-style comments.

TEST=Use abuild --timeless to check that all AGESA f14/f15tn/f16kb
mainboards result in identical coreboot binaries.

Change-Id: Ibe1f279dd22ae7657ea7b7766f88004dbf4dceb5
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/41589
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Mike Banon <mikebdp2@gmail.com>
Reviewed-by: Krystian Hebel <krystian.hebel@3mdeb.com>
This commit is contained in:
Angel Pons 2020-05-20 23:34:54 +02:00 committed by Nico Huber
parent 927f6ae84a
commit 66ee42daba
25 changed files with 96 additions and 180 deletions

View File

@ -9,11 +9,8 @@
* build option selections desired for that platform.
*
* For Information about this file, see @ref platforminstall.
*
*/
/* Select the CPU family. */
#define INSTALL_FAMILY_10_SUPPORT FALSE
#define INSTALL_FAMILY_12_SUPPORT FALSE
@ -85,7 +82,6 @@
#define BLDOPT_REMOVE_GFX_RECOVERY TRUE
#define BLDOPT_REMOVE_EARLY_SAMPLES TRUE
#define BLDCFG_PCI_MMIO_BASE CONFIG_MMCONF_BASE_ADDRESS
#define BLDCFG_PCI_MMIO_SIZE CONFIG_MMCONF_BUS_NUMBER
@ -252,7 +248,7 @@ CONST AP_MTRR_SETTINGS ROMDATA OntarioApMtrrSettingsList[] =
#define DDR1866_FREQUENCY 933 ///< DDR 1866
#define UNSUPPORTED_DDR_FREQUENCY 934 ///< Highest limit of DDR frequency
/* QUANDRANK_TYPE*/
/* QUANDRANK_TYPE */
#define QUADRANK_REGISTERED 0 ///< Quadrank registered DIMM
#define QUADRANK_UNBUFFERED 1 ///< Quadrank unbuffered DIMM

View File

@ -9,7 +9,6 @@
* build option selections desired for that platform.
*
* For Information about this file, see @ref platforminstall.
*
*/
#include <AGESA.h>
@ -29,7 +28,6 @@
#define INSTALL_AM3_SOCKET_SUPPORT FALSE
#define INSTALL_FM2_SOCKET_SUPPORT FALSE
#ifdef BLDOPT_REMOVE_FT3_SOCKET_SUPPORT
#if BLDOPT_REMOVE_FT3_SOCKET_SUPPORT == TRUE
#undef INSTALL_FT3_SOCKET_SUPPORT
@ -214,7 +212,6 @@ CONST AP_MTRR_SETTINGS ROMDATA KabiniApMtrrSettingsList[] =
#define BLDCFG_AP_MTRR_SETTINGS_LIST &KabiniApMtrrSettingsList
/* Include the files that instantiate the configuration definitions. */
#include "cpuRegisters.h"
#include "cpuFamRegisters.h"
@ -250,7 +247,7 @@ CONST AP_MTRR_SETTINGS ROMDATA KabiniApMtrrSettingsList[] =
//#define DDR2400_FREQUENCY 1200 ///< DDR 2400
//#define UNSUPPORTED_DDR_FREQUENCY 1201 ///< Highest limit of DDR frequency
//
///* QUANDRANK_TYPE*/
///* QUANDRANK_TYPE */
//#define QUADRANK_REGISTERED 0 ///< Quadrank registered DIMM
//#define QUADRANK_UNBUFFERED 1 ///< Quadrank unbuffered DIMM
//

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@ -9,7 +9,6 @@
* build option selections desired for that platform.
*
* For Information about this file, see @ref platforminstall.
*
*/
#include <AGESA.h>
@ -141,7 +140,7 @@
#if CONFIG(GFXUMA)
#define BLDCFG_UMA_ALIGNMENT UMA_4MB_ALIGNED
#define BLDCFG_UMA_ALLOCATION_MODE UMA_SPECIFIED
//#define BLDCFG_UMA_ALLOCATION_SIZE 0x1000//0x1800//0x1000 /* (1000 << 16) = 256M*/
//#define BLDCFG_UMA_ALLOCATION_SIZE 0x1000//0x1800//0x1000 /* (1000 << 16) = 256M */
#define BLDCFG_UMA_ALLOCATION_SIZE 0x2000//512M
#define BLDCFG_UMA_ABOVE4G_SUPPORT FALSE
#endif
@ -215,7 +214,6 @@ CONST AP_MTRR_SETTINGS ROMDATA TrinityApMtrrSettingsList[] =
#define BLDCFG_AP_MTRR_SETTINGS_LIST &TrinityApMtrrSettingsList
/* Include the files that instantiate the configuration definitions. */
#include "cpuRegisters.h"
#include "cpuFamRegisters.h"
@ -251,7 +249,7 @@ CONST AP_MTRR_SETTINGS ROMDATA TrinityApMtrrSettingsList[] =
#define DDR2400_FREQUENCY 1200 ///< DDR 2400
#define UNSUPPORTED_DDR_FREQUENCY 1201 ///< Highest limit of DDR frequency
/* QUANDRANK_TYPE*/
/* QUANDRANK_TYPE */
#define QUADRANK_REGISTERED 0 ///< Quadrank registered DIMM
#define QUADRANK_UNBUFFERED 1 ///< Quadrank unbuffered DIMM

View File

@ -9,11 +9,8 @@
* build option selections desired for that platform.
*
* For Information about this file, see @ref platforminstall.
*
*/
/* Select the CPU family. */
#define INSTALL_FAMILY_10_SUPPORT FALSE
#define INSTALL_FAMILY_12_SUPPORT FALSE
@ -85,7 +82,6 @@
#define BLDOPT_REMOVE_GFX_RECOVERY TRUE
#define BLDOPT_REMOVE_EARLY_SAMPLES TRUE
#define BLDCFG_PCI_MMIO_BASE CONFIG_MMCONF_BASE_ADDRESS
#define BLDCFG_PCI_MMIO_SIZE CONFIG_MMCONF_BUS_NUMBER
@ -252,7 +248,7 @@ CONST AP_MTRR_SETTINGS ROMDATA OntarioApMtrrSettingsList[] =
#define DDR1866_FREQUENCY 933 ///< DDR 1866
#define UNSUPPORTED_DDR_FREQUENCY 934 ///< Highest limit of DDR frequency
/* QUANDRANK_TYPE*/
/* QUANDRANK_TYPE */
#define QUADRANK_REGISTERED 0 ///< Quadrank registered DIMM
#define QUADRANK_UNBUFFERED 1 ///< Quadrank unbuffered DIMM

View File

@ -9,11 +9,8 @@
* build option selections desired for that platform.
*
* For Information about this file, see @ref platforminstall.
*
*/
/* Select the CPU family. */
#define INSTALL_FAMILY_10_SUPPORT FALSE
#define INSTALL_FAMILY_12_SUPPORT FALSE
@ -85,7 +82,6 @@
#define BLDOPT_REMOVE_GFX_RECOVERY TRUE
#define BLDOPT_REMOVE_EARLY_SAMPLES TRUE
#define BLDCFG_PCI_MMIO_BASE CONFIG_MMCONF_BASE_ADDRESS
#define BLDCFG_PCI_MMIO_SIZE CONFIG_MMCONF_BUS_NUMBER
@ -252,7 +248,7 @@ CONST AP_MTRR_SETTINGS ROMDATA OntarioApMtrrSettingsList[] =
#define DDR1866_FREQUENCY 933 ///< DDR 1866
#define UNSUPPORTED_DDR_FREQUENCY 934 ///< Highest limit of DDR frequency
/* QUANDRANK_TYPE*/
/* QUANDRANK_TYPE */
#define QUADRANK_REGISTERED 0 ///< Quadrank registered DIMM
#define QUADRANK_UNBUFFERED 1 ///< Quadrank unbuffered DIMM

View File

@ -9,7 +9,6 @@
* build option selections desired for that platform.
*
* For Information about this file, see @ref platforminstall.
*
*/
#include <AGESA.h>
@ -141,7 +140,7 @@
#if CONFIG(GFXUMA)
#define BLDCFG_UMA_ALIGNMENT UMA_4MB_ALIGNED
#define BLDCFG_UMA_ALLOCATION_MODE UMA_SPECIFIED
//#define BLDCFG_UMA_ALLOCATION_SIZE 0x1000//0x1800//0x1000 /* (1000 << 16) = 256M*/
//#define BLDCFG_UMA_ALLOCATION_SIZE 0x1000//0x1800//0x1000 /* (1000 << 16) = 256M */
#define BLDCFG_UMA_ALLOCATION_SIZE 0x2000//512M
#define BLDCFG_UMA_ABOVE4G_SUPPORT FALSE
#endif
@ -215,7 +214,6 @@ CONST AP_MTRR_SETTINGS ROMDATA TrinityApMtrrSettingsList[] =
#define BLDCFG_AP_MTRR_SETTINGS_LIST &TrinityApMtrrSettingsList
/* Include the files that instantiate the configuration definitions. */
#include "cpuRegisters.h"
#include "cpuFamRegisters.h"
@ -251,7 +249,7 @@ CONST AP_MTRR_SETTINGS ROMDATA TrinityApMtrrSettingsList[] =
#define DDR2400_FREQUENCY 1200 ///< DDR 2400
#define UNSUPPORTED_DDR_FREQUENCY 1201 ///< Highest limit of DDR frequency
/* QUANDRANK_TYPE*/
/* QUANDRANK_TYPE */
#define QUADRANK_REGISTERED 0 ///< Quadrank registered DIMM
#define QUADRANK_UNBUFFERED 1 ///< Quadrank unbuffered DIMM

View File

@ -9,11 +9,8 @@
* build option selections desired for that platform.
*
* For Information about this file, see @ref platforminstall.
*
*/
/* Select the CPU family. */
#define INSTALL_FAMILY_10_SUPPORT FALSE
#define INSTALL_FAMILY_12_SUPPORT FALSE
@ -85,7 +82,6 @@
#define BLDOPT_REMOVE_GFX_RECOVERY TRUE
#define BLDOPT_REMOVE_EARLY_SAMPLES TRUE
#define BLDCFG_PCI_MMIO_BASE CONFIG_MMCONF_BASE_ADDRESS
#define BLDCFG_PCI_MMIO_SIZE CONFIG_MMCONF_BUS_NUMBER
@ -252,7 +248,7 @@ CONST AP_MTRR_SETTINGS ROMDATA OntarioApMtrrSettingsList[] =
#define DDR1866_FREQUENCY 933 ///< DDR 1866
#define UNSUPPORTED_DDR_FREQUENCY 934 ///< Highest limit of DDR frequency
/* QUANDRANK_TYPE*/
/* QUANDRANK_TYPE */
#define QUADRANK_REGISTERED 0 ///< Quadrank registered DIMM
#define QUADRANK_UNBUFFERED 1 ///< Quadrank unbuffered DIMM

View File

@ -9,12 +9,10 @@
* build option selections desired for that platform.
*
* For Information about this file, see @ref platforminstall.
*
*/
#include <AGESA.h>
/* Select the CPU family. */
#define INSTALL_FAMILY_10_SUPPORT FALSE
#define INSTALL_FAMILY_12_SUPPORT FALSE
@ -86,7 +84,6 @@
#define BLDOPT_REMOVE_GFX_RECOVERY TRUE
#define BLDOPT_REMOVE_EARLY_SAMPLES TRUE
/*
* Agesa configuration values selection.
* Uncomment and specify the value for the configuration options

View File

@ -9,7 +9,6 @@
* build option selections desired for that platform.
*
* For Information about this file, see @ref platforminstall.
*
*/
#include <AGESA.h>
@ -29,7 +28,6 @@
#define INSTALL_AM3_SOCKET_SUPPORT FALSE
#define INSTALL_FM2_SOCKET_SUPPORT FALSE
#ifdef BLDOPT_REMOVE_FT3_SOCKET_SUPPORT
#if BLDOPT_REMOVE_FT3_SOCKET_SUPPORT == TRUE
#undef INSTALL_FT3_SOCKET_SUPPORT
@ -214,7 +212,6 @@ CONST AP_MTRR_SETTINGS ROMDATA KabiniApMtrrSettingsList[] =
#define BLDCFG_AP_MTRR_SETTINGS_LIST &KabiniApMtrrSettingsList
/* Include the files that instantiate the configuration definitions. */
#include "cpuRegisters.h"
#include "cpuFamRegisters.h"
@ -250,7 +247,7 @@ CONST AP_MTRR_SETTINGS ROMDATA KabiniApMtrrSettingsList[] =
//#define DDR2400_FREQUENCY 1200 ///< DDR 2400
//#define UNSUPPORTED_DDR_FREQUENCY 1201 ///< Highest limit of DDR frequency
//
///* QUANDRANK_TYPE*/
///* QUANDRANK_TYPE */
//#define QUADRANK_REGISTERED 0 ///< Quadrank registered DIMM
//#define QUADRANK_UNBUFFERED 1 ///< Quadrank unbuffered DIMM
//

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@ -9,10 +9,8 @@
* build option selections desired for that platform.
*
* For Information about this file, see @ref platforminstall.
*
*/
#include <vendorcode/amd/agesa/f16kb/AGESA.h>
/* Include the files that instantiate the configuration definitions. */
@ -262,7 +260,7 @@ CONST AP_MTRR_SETTINGS ROMDATA KabiniApMtrrSettingsList[] =
//#define DDR2400_FREQUENCY 1200 ///< DDR 2400
//#define UNSUPPORTED_DDR_FREQUENCY 1201 ///< Highest limit of DDR frequency
//
///* QUANDRANK_TYPE*/
///* QUANDRANK_TYPE */
//#define QUADRANK_REGISTERED 0 ///< Quadrank registered DIMM
//#define QUADRANK_UNBUFFERED 1 ///< Quadrank unbuffered DIMM
//

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@ -9,10 +9,8 @@
* build option selections desired for that platform.
*
* For Information about this file, see @ref platforminstall.
*
*/
#include <vendorcode/amd/agesa/f15tn/AGESA.h>
/* Include the files that instantiate the configuration definitions. */
@ -27,7 +25,6 @@
#include <vendorcode/amd/agesa/f15tn/Proc/Mem/mm.h>
#include <vendorcode/amd/agesa/f15tn/Proc/Mem/mn.h>
/* Select the CPU family. */
#define INSTALL_FAMILY_10_SUPPORT FALSE
#define INSTALL_FAMILY_12_SUPPORT FALSE
@ -156,7 +153,7 @@
#if CONFIG(GFXUMA)
#define BLDCFG_UMA_ALIGNMENT UMA_4MB_ALIGNED
#define BLDCFG_UMA_ALLOCATION_MODE UMA_SPECIFIED
//#define BLDCFG_UMA_ALLOCATION_SIZE 0x1000//0x1800//0x1000 /* (1000 << 16) = 256M*/
//#define BLDCFG_UMA_ALLOCATION_SIZE 0x1000//0x1800//0x1000 /* (1000 << 16) = 256M */
#define BLDCFG_UMA_ALLOCATION_SIZE 0x2000//512M
#define BLDCFG_UMA_ABOVE4G_SUPPORT FALSE
#endif
@ -252,7 +249,7 @@ CONST AP_MTRR_SETTINGS ROMDATA TrinityApMtrrSettingsList[] =
#define DDR2400_FREQUENCY 1200 ///< DDR 2400
#define UNSUPPORTED_DDR_FREQUENCY 1201 ///< Highest limit of DDR frequency
/* QUANDRANK_TYPE*/
/* QUANDRANK_TYPE */
#define QUADRANK_REGISTERED 0 ///< Quadrank registered DIMM
#define QUADRANK_UNBUFFERED 1 ///< Quadrank unbuffered DIMM

View File

@ -9,7 +9,6 @@
* build option selections desired for that platform.
*
* For Information about this file, see @ref platforminstall.
*
*/
#include <AGESA.h>
@ -29,7 +28,6 @@
#define INSTALL_AM3_SOCKET_SUPPORT FALSE
#define INSTALL_FM2_SOCKET_SUPPORT FALSE
#ifdef BLDOPT_REMOVE_FT3_SOCKET_SUPPORT
#if BLDOPT_REMOVE_FT3_SOCKET_SUPPORT == TRUE
#undef INSTALL_FT3_SOCKET_SUPPORT
@ -249,7 +247,7 @@ CONST AP_MTRR_SETTINGS ROMDATA KabiniApMtrrSettingsList[] =
//#define DDR2400_FREQUENCY 1200 ///< DDR 2400
//#define UNSUPPORTED_DDR_FREQUENCY 1201 ///< Highest limit of DDR frequency
//
///* QUANDRANK_TYPE*/
///* QUANDRANK_TYPE */
//#define QUADRANK_REGISTERED 0 ///< Quadrank registered DIMM
//#define QUADRANK_UNBUFFERED 1 ///< Quadrank unbuffered DIMM
//

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@ -9,7 +9,6 @@
* build option selections desired for that platform.
*
* For Information about this file, see @ref platforminstall.
*
*/
#include <AGESA.h>
@ -29,7 +28,6 @@
#define INSTALL_AM3_SOCKET_SUPPORT FALSE
#define INSTALL_FM2_SOCKET_SUPPORT FALSE
#ifdef BLDOPT_REMOVE_FT3_SOCKET_SUPPORT
#if BLDOPT_REMOVE_FT3_SOCKET_SUPPORT == TRUE
#undef INSTALL_FT3_SOCKET_SUPPORT
@ -214,7 +212,6 @@ CONST AP_MTRR_SETTINGS ROMDATA KabiniApMtrrSettingsList[] =
#define BLDCFG_AP_MTRR_SETTINGS_LIST &KabiniApMtrrSettingsList
/* Include the files that instantiate the configuration definitions. */
#include "cpuRegisters.h"
#include "cpuFamRegisters.h"
@ -250,7 +247,7 @@ CONST AP_MTRR_SETTINGS ROMDATA KabiniApMtrrSettingsList[] =
//#define DDR2400_FREQUENCY 1200 ///< DDR 2400
//#define UNSUPPORTED_DDR_FREQUENCY 1201 ///< Highest limit of DDR frequency
//
///* QUANDRANK_TYPE*/
///* QUANDRANK_TYPE */
//#define QUADRANK_REGISTERED 0 ///< Quadrank registered DIMM
//#define QUADRANK_UNBUFFERED 1 ///< Quadrank unbuffered DIMM
//

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@ -9,7 +9,6 @@
* build option selections desired for that platform.
*
* For Information about this file, see @ref platforminstall.
*
*/
#include <AGESA.h>
@ -29,7 +28,6 @@
#define INSTALL_AM3_SOCKET_SUPPORT FALSE
#define INSTALL_FM2_SOCKET_SUPPORT FALSE
#ifdef BLDOPT_REMOVE_FT3_SOCKET_SUPPORT
#if BLDOPT_REMOVE_FT3_SOCKET_SUPPORT == TRUE
#undef INSTALL_FT3_SOCKET_SUPPORT
@ -214,7 +212,6 @@ CONST AP_MTRR_SETTINGS ROMDATA KabiniApMtrrSettingsList[] =
#define BLDCFG_AP_MTRR_SETTINGS_LIST &KabiniApMtrrSettingsList
/* Include the files that instantiate the configuration definitions. */
#include "cpuRegisters.h"
#include "cpuFamRegisters.h"
@ -250,7 +247,7 @@ CONST AP_MTRR_SETTINGS ROMDATA KabiniApMtrrSettingsList[] =
//#define DDR2400_FREQUENCY 1200 ///< DDR 2400
//#define UNSUPPORTED_DDR_FREQUENCY 1201 ///< Highest limit of DDR frequency
//
///* QUANDRANK_TYPE*/
///* QUANDRANK_TYPE */
//#define QUADRANK_REGISTERED 0 ///< Quadrank registered DIMM
//#define QUADRANK_UNBUFFERED 1 ///< Quadrank unbuffered DIMM
//

View File

@ -9,11 +9,8 @@
* build option selections desired for that platform.
*
* For Information about this file, see @ref platforminstall.
*
*/
/* Select the cpu family. */
#define INSTALL_FAMILY_10_SUPPORT FALSE
#define INSTALL_FAMILY_12_SUPPORT FALSE
@ -85,7 +82,6 @@
#define BLDOPT_REMOVE_GFX_RECOVERY TRUE
#define BLDOPT_REMOVE_EARLY_SAMPLES TRUE
#define BLDCFG_PCI_MMIO_BASE CONFIG_MMCONF_BASE_ADDRESS
#define BLDCFG_PCI_MMIO_SIZE CONFIG_MMCONF_BUS_NUMBER
@ -252,7 +248,7 @@ CONST AP_MTRR_SETTINGS ROMDATA OntarioApMtrrSettingsList[] =
#define DDR1866_FREQUENCY 933 ///< DDR 1866
#define UNSUPPORTED_DDR_FREQUENCY 934 ///< Highest limit of DDR frequency
/* QUANDRANK_TYPE*/
/* QUANDRANK_TYPE */
#define QUADRANK_REGISTERED 0 ///< Quadrank registered DIMM
#define QUADRANK_UNBUFFERED 1 ///< Quadrank unbuffered DIMM

View File

@ -9,12 +9,8 @@
* build option selections desired for that platform.
*
* For Information about this file, see @ref platforminstall.
*
*/
/* Select the CPU family. */
#define INSTALL_FAMILY_10_SUPPORT FALSE
#define INSTALL_FAMILY_12_SUPPORT FALSE
@ -86,7 +82,6 @@
#define BLDOPT_REMOVE_GFX_RECOVERY TRUE
#define BLDOPT_REMOVE_EARLY_SAMPLES TRUE
#define BLDCFG_PCI_MMIO_BASE CONFIG_MMCONF_BASE_ADDRESS
#define BLDCFG_PCI_MMIO_SIZE CONFIG_MMCONF_BUS_NUMBER
@ -253,7 +248,7 @@ CONST AP_MTRR_SETTINGS ROMDATA OntarioApMtrrSettingsList[] =
#define DDR1866_FREQUENCY 933 ///< DDR 1866
#define UNSUPPORTED_DDR_FREQUENCY 934 ///< Highest limit of DDR frequency
/* QUANDRANK_TYPE*/
/* QUANDRANK_TYPE */
#define QUADRANK_REGISTERED 0 ///< Quadrank registered DIMM
#define QUADRANK_UNBUFFERED 1 ///< Quadrank unbuffered DIMM

View File

@ -9,7 +9,6 @@
* build option selections desired for that platform.
*
* For Information about this file, see @ref platforminstall.
*
*/
#include <AGESA.h>
@ -29,7 +28,6 @@
#define INSTALL_AM3_SOCKET_SUPPORT FALSE
#define INSTALL_FM2_SOCKET_SUPPORT FALSE
#ifdef BLDOPT_REMOVE_FT3_SOCKET_SUPPORT
#if BLDOPT_REMOVE_FT3_SOCKET_SUPPORT == TRUE
#undef INSTALL_FT3_SOCKET_SUPPORT
@ -249,7 +247,7 @@ CONST AP_MTRR_SETTINGS ROMDATA KabiniApMtrrSettingsList[] =
//#define DDR2400_FREQUENCY 1200 ///< DDR 2400
//#define UNSUPPORTED_DDR_FREQUENCY 1201 ///< Highest limit of DDR frequency
//
///* QUANDRANK_TYPE*/
///* QUANDRANK_TYPE */
//#define QUADRANK_REGISTERED 0 ///< Quadrank registered DIMM
//#define QUADRANK_UNBUFFERED 1 ///< Quadrank unbuffered DIMM
//

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@ -33,7 +33,6 @@
#define INSTALL_AM3_SOCKET_SUPPORT FALSE
#define INSTALL_FM2_SOCKET_SUPPORT FALSE
#ifdef BLDOPT_REMOVE_FT3_SOCKET_SUPPORT
#if BLDOPT_REMOVE_FT3_SOCKET_SUPPORT == TRUE
#undef INSTALL_FT3_SOCKET_SUPPORT
@ -218,7 +217,6 @@ CONST AP_MTRR_SETTINGS ROMDATA KabiniApMtrrSettingsList[] =
#define BLDCFG_AP_MTRR_SETTINGS_LIST &KabiniApMtrrSettingsList
/* Include the files that instantiate the configuration definitions. */
#include "cpuRegisters.h"
#include "cpuFamRegisters.h"
@ -254,7 +252,7 @@ CONST AP_MTRR_SETTINGS ROMDATA KabiniApMtrrSettingsList[] =
//#define DDR2400_FREQUENCY 1200 ///< DDR 2400
//#define UNSUPPORTED_DDR_FREQUENCY 1201 ///< Highest limit of DDR frequency
//
///* QUANDRANK_TYPE*/
///* QUANDRANK_TYPE */
//#define QUADRANK_REGISTERED 0 ///< Quadrank registered DIMM
//#define QUADRANK_UNBUFFERED 1 ///< Quadrank unbuffered DIMM
//

View File

@ -9,12 +9,10 @@
* build option selections desired for that platform.
*
* For Information about this file, see @ref platforminstall.
*
*/
#include "mainboard.h"
#include <vendorcode/amd/agesa/f15tn/AGESA.h>
/* Include the files that instantiate the configuration definitions. */
@ -29,7 +27,6 @@
#include <vendorcode/amd/agesa/f15tn/Proc/Mem/mm.h>
#include <vendorcode/amd/agesa/f15tn/Proc/Mem/mn.h>
/* Select the CPU family. */
#define INSTALL_FAMILY_10_SUPPORT FALSE
#define INSTALL_FAMILY_12_SUPPORT FALSE
@ -157,7 +154,7 @@
#if CONFIG(GFXUMA)
#define BLDCFG_UMA_ALIGNMENT UMA_4MB_ALIGNED
#define BLDCFG_UMA_ALLOCATION_MODE UMA_SPECIFIED
//#define BLDCFG_UMA_ALLOCATION_SIZE 0x1000//0x1800//0x1000 /* (1000 << 16) = 256M*/
//#define BLDCFG_UMA_ALLOCATION_SIZE 0x1000//0x1800//0x1000 /* (1000 << 16) = 256M */
#define BLDCFG_UMA_ALLOCATION_SIZE 0x2000//512M
#define BLDCFG_UMA_ABOVE4G_SUPPORT FALSE
#endif
@ -253,7 +250,7 @@ CONST AP_MTRR_SETTINGS ROMDATA TrinityApMtrrSettingsList[] =
#define DDR2400_FREQUENCY 1200 ///< DDR 2400
#define UNSUPPORTED_DDR_FREQUENCY 1201 ///< Highest limit of DDR frequency
/* QUANDRANK_TYPE*/
/* QUANDRANK_TYPE */
#define QUADRANK_REGISTERED 0 ///< Quadrank registered DIMM
#define QUADRANK_UNBUFFERED 1 ///< Quadrank unbuffered DIMM
@ -339,7 +336,6 @@ GPIO_CONTROL pavilion_m6_1035dx_gpio[] = {
};
#define BLDCFG_FCH_GPIO_CONTROL_LIST (&pavilion_m6_1035dx_gpio[0])
/* These definitions could be moved to a common Hudson header, should we decide
* to provide our own, saner SCI mapping function
*/

View File

@ -9,10 +9,8 @@
* build option selections desired for that platform.
*
* For Information about this file, see @ref platforminstall.
*
*/
#include <vendorcode/amd/agesa/f14/AGESA.h>
/* Include the files that instantiate the configuration definitions. */
@ -27,7 +25,6 @@
#include <vendorcode/amd/agesa/f14/Proc/Mem/mm.h>
#include <vendorcode/amd/agesa/f14/Proc/Mem/mn.h>
/* Select the CPU family. */
#define INSTALL_FAMILY_10_SUPPORT FALSE
#define INSTALL_FAMILY_12_SUPPORT FALSE
@ -99,7 +96,6 @@
#define BLDOPT_REMOVE_GFX_RECOVERY TRUE
#define BLDOPT_REMOVE_EARLY_SAMPLES TRUE
#define BLDCFG_PCI_MMIO_BASE CONFIG_MMCONF_BASE_ADDRESS
#define BLDCFG_PCI_MMIO_SIZE CONFIG_MMCONF_BUS_NUMBER
@ -255,7 +251,7 @@ const AP_MTRR_SETTINGS ROMDATA OntarioApMtrrSettingsList[] =
#define DDR1866_FREQUENCY 933 /**< DDR 1866 */
#define UNSUPPORTED_DDR_FREQUENCY 934 /**< Max limit of DDR frequency */
/* QUANDRANK_TYPE*/
/* QUANDRANK_TYPE */
#define QUADRANK_REGISTERED 0 /**< Quadrank registered DIMM */
#define QUADRANK_UNBUFFERED 1 /**< Quadrank unbuffered DIMM */

View File

@ -9,12 +9,10 @@
* build option selections desired for that platform.
*
* For Information about this file, see @ref platforminstall.
*
*/
#include "mainboard.h"
#include <vendorcode/amd/agesa/f15tn/AGESA.h>
/* Include the files that instantiate the configuration definitions. */
@ -29,7 +27,6 @@
#include <vendorcode/amd/agesa/f15tn/Proc/Mem/mm.h>
#include <vendorcode/amd/agesa/f15tn/Proc/Mem/mn.h>
/* Select the CPU family. */
#define INSTALL_FAMILY_10_SUPPORT FALSE
#define INSTALL_FAMILY_12_SUPPORT FALSE
@ -157,7 +154,7 @@
#if CONFIG(GFXUMA)
#define BLDCFG_UMA_ALIGNMENT UMA_4MB_ALIGNED
#define BLDCFG_UMA_ALLOCATION_MODE UMA_SPECIFIED
//#define BLDCFG_UMA_ALLOCATION_SIZE 0x1000//0x1800//0x1000 /* (1000 << 16) = 256M*/
//#define BLDCFG_UMA_ALLOCATION_SIZE 0x1000//0x1800//0x1000 /* (1000 << 16) = 256M */
#define BLDCFG_UMA_ALLOCATION_SIZE 0x2000//512M
#define BLDCFG_UMA_ABOVE4G_SUPPORT FALSE
#endif
@ -253,7 +250,7 @@ CONST AP_MTRR_SETTINGS ROMDATA TrinityApMtrrSettingsList[] =
#define DDR2400_FREQUENCY 1200 ///< DDR 2400
#define UNSUPPORTED_DDR_FREQUENCY 1201 ///< Highest limit of DDR frequency
/* QUANDRANK_TYPE*/
/* QUANDRANK_TYPE */
#define QUADRANK_REGISTERED 0 ///< Quadrank registered DIMM
#define QUADRANK_UNBUFFERED 1 ///< Quadrank unbuffered DIMM
@ -339,7 +336,6 @@ GPIO_CONTROL lenovo_g505s_gpio[] = {
};
#define BLDCFG_FCH_GPIO_CONTROL_LIST (&lenovo_g505s_gpio[0])
/* These definitions could be moved to a common Hudson header, should we decide
* to provide our own, saner SCI mapping function
*/

View File

@ -9,12 +9,8 @@
* build option selections desired for that platform.
*
* For Information about this file, see @ref platforminstall.
*
*/
/* Select the CPU family. */
#define INSTALL_FAMILY_10_SUPPORT FALSE
#define INSTALL_FAMILY_12_SUPPORT FALSE
@ -86,7 +82,6 @@
#define BLDOPT_REMOVE_GFX_RECOVERY TRUE
#define BLDOPT_REMOVE_EARLY_SAMPLES TRUE
#define BLDCFG_PCI_MMIO_BASE CONFIG_MMCONF_BASE_ADDRESS
#define BLDCFG_PCI_MMIO_SIZE CONFIG_MMCONF_BUS_NUMBER
@ -253,7 +248,7 @@ CONST AP_MTRR_SETTINGS ROMDATA OntarioApMtrrSettingsList[] =
#define DDR1866_FREQUENCY 933 ///< DDR 1866
#define UNSUPPORTED_DDR_FREQUENCY 934 ///< Highest limit of DDR frequency
/* QUANDRANK_TYPE*/
/* QUANDRANK_TYPE */
#define QUADRANK_REGISTERED 0 ///< Quadrank registered DIMM
#define QUADRANK_UNBUFFERED 1 ///< Quadrank unbuffered DIMM

View File

@ -9,12 +9,8 @@
* build option selections desired for that platform.
*
* For Information about this file, see @ref platforminstall.
*
*/
/* Select the CPU family. */
#define INSTALL_FAMILY_10_SUPPORT FALSE
#define INSTALL_FAMILY_12_SUPPORT FALSE
@ -86,7 +82,6 @@
#define BLDOPT_REMOVE_GFX_RECOVERY TRUE
#define BLDOPT_REMOVE_EARLY_SAMPLES TRUE
#define BLDCFG_PCI_MMIO_BASE CONFIG_MMCONF_BASE_ADDRESS
#define BLDCFG_PCI_MMIO_SIZE CONFIG_MMCONF_BUS_NUMBER
@ -253,7 +248,7 @@ CONST AP_MTRR_SETTINGS ROMDATA OntarioApMtrrSettingsList[] =
#define DDR1866_FREQUENCY 933 ///< DDR 1866
#define UNSUPPORTED_DDR_FREQUENCY 934 ///< Highest limit of DDR frequency
/* QUANDRANK_TYPE*/
/* QUANDRANK_TYPE */
#define QUADRANK_REGISTERED 0 ///< Quadrank registered DIMM
#define QUADRANK_UNBUFFERED 1 ///< Quadrank unbuffered DIMM

View File

@ -9,10 +9,8 @@
* build option selections desired for that platform.
*
* For Information about this file, see @ref platforminstall.
*
*/
#include <vendorcode/amd/agesa/f15tn/AGESA.h>
/* Include the files that instantiate the configuration definitions. */
@ -27,7 +25,6 @@
#include <vendorcode/amd/agesa/f15tn/Proc/Mem/mm.h>
#include <vendorcode/amd/agesa/f15tn/Proc/Mem/mn.h>
/* Select the CPU family. */
#define INSTALL_FAMILY_10_SUPPORT FALSE
#define INSTALL_FAMILY_12_SUPPORT FALSE
@ -156,7 +153,7 @@
#if CONFIG(GFXUMA)
#define BLDCFG_UMA_ALIGNMENT UMA_4MB_ALIGNED
#define BLDCFG_UMA_ALLOCATION_MODE UMA_SPECIFIED
//#define BLDCFG_UMA_ALLOCATION_SIZE 0x1000//0x1800//0x1000 /* (1000 << 16) = 256M*/
//#define BLDCFG_UMA_ALLOCATION_SIZE 0x1000//0x1800//0x1000 /* (1000 << 16) = 256M */
#define BLDCFG_UMA_ALLOCATION_SIZE 0x2000//512M
#define BLDCFG_UMA_ABOVE4G_SUPPORT FALSE
#endif
@ -252,7 +249,7 @@ CONST AP_MTRR_SETTINGS ROMDATA TrinityApMtrrSettingsList[] =
#define DDR2400_FREQUENCY 1200 ///< DDR 2400
#define UNSUPPORTED_DDR_FREQUENCY 1201 ///< Highest limit of DDR frequency
/* QUANDRANK_TYPE*/
/* QUANDRANK_TYPE */
#define QUADRANK_REGISTERED 0 ///< Quadrank registered DIMM
#define QUADRANK_UNBUFFERED 1 ///< Quadrank unbuffered DIMM

View File

@ -9,11 +9,8 @@
* build option selections desired for that platform.
*
* For Information about this file, see @ref platforminstall.
*
*/
/* Select the CPU family. */
#define INSTALL_FAMILY_10_SUPPORT FALSE
#define INSTALL_FAMILY_12_SUPPORT FALSE
@ -85,7 +82,6 @@
#define BLDOPT_REMOVE_GFX_RECOVERY TRUE
#define BLDOPT_REMOVE_EARLY_SAMPLES TRUE
#define BLDCFG_PCI_MMIO_BASE CONFIG_MMCONF_BASE_ADDRESS
#define BLDCFG_PCI_MMIO_SIZE CONFIG_MMCONF_BUS_NUMBER
@ -252,7 +248,7 @@ CONST AP_MTRR_SETTINGS ROMDATA OntarioApMtrrSettingsList[] =
#define DDR1866_FREQUENCY 933 ///< DDR 1866
#define UNSUPPORTED_DDR_FREQUENCY 934 ///< Highest limit of DDR frequency
/* QUANDRANK_TYPE*/
/* QUANDRANK_TYPE */
#define QUADRANK_REGISTERED 0 ///< Quadrank registered DIMM
#define QUADRANK_UNBUFFERED 1 ///< Quadrank unbuffered DIMM