sb/intel/i82801dx: Get rid of device_t
Use of device_t has been abandoned in ramstage. Change-Id: I36f064b67f14556e38b41b7f64c3e27d8d935367 Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr> Reviewed-on: https://review.coreboot.org/26255 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
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@ -20,7 +20,7 @@
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#include <device/pci_ids.h>
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#include <device/pci_ids.h>
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#include "i82801dx.h"
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#include "i82801dx.h"
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void i82801dx_enable(device_t dev)
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void i82801dx_enable(struct device *dev)
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{
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{
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unsigned int index = 0;
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unsigned int index = 0;
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uint8_t bHasDisableBit = 0;
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uint8_t bHasDisableBit = 0;
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@ -28,7 +28,7 @@ void i82801dx_enable(device_t dev)
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// all 82801dbm devices are in bus 0
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// all 82801dbm devices are in bus 0
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unsigned int devfn = PCI_DEVFN(0x1f, 0); // lpc
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unsigned int devfn = PCI_DEVFN(0x1f, 0); // lpc
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device_t lpc_dev = dev_find_slot(0, devfn); // 0
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struct device *lpc_dev = dev_find_slot(0, devfn); // 0
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if (!lpc_dev)
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if (!lpc_dev)
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return;
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return;
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@ -32,7 +32,7 @@
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#if !defined(__ASSEMBLER__)
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#if !defined(__ASSEMBLER__)
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#if !defined(__SIMPLE_DEVICE__)
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#if !defined(__SIMPLE_DEVICE__)
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#include "chip.h"
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#include "chip.h"
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extern void i82801dx_enable(device_t dev);
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extern void i82801dx_enable(struct device *dev);
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#else
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#else
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void enable_smbus(void);
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void enable_smbus(void);
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int smbus_read_byte(unsigned device, unsigned address);
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int smbus_read_byte(unsigned device, unsigned address);
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@ -81,7 +81,7 @@ static void i82801dx_enable_serial_irqs(struct device *dev)
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(1 << 7) | (0 << 6) | ((21 - 17) << 2) | (0 << 0));
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(1 << 7) | (0 << 6) | ((21 - 17) << 2) | (0 << 0));
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}
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}
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static void i82801dx_pirq_init(device_t dev)
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static void i82801dx_pirq_init(struct device *dev)
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{
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{
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/* Get the chip configuration */
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/* Get the chip configuration */
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config_t *config = dev->chip_info;
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config_t *config = dev->chip_info;
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@ -96,7 +96,7 @@ static void i82801dx_pirq_init(device_t dev)
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pci_write_config8(dev, PIRQH_ROUT, config->pirqh_routing);
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pci_write_config8(dev, PIRQH_ROUT, config->pirqh_routing);
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}
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}
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static void i82801dx_power_options(device_t dev)
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static void i82801dx_power_options(struct device *dev)
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{
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{
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u8 reg8;
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u8 reg8;
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u16 reg16, pmbase;
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u16 reg16, pmbase;
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@ -175,7 +175,7 @@ static void i82801dx_power_options(device_t dev)
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outl(reg32, pmbase + 0x04);
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outl(reg32, pmbase + 0x04);
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}
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}
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static void gpio_init(device_t dev)
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static void gpio_init(struct device *dev)
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{
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{
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/* This should be done in romstage.c already */
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/* This should be done in romstage.c already */
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pci_write_config32(dev, GPIO_BASE, (GPIOBASE_ADDR | 1));
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pci_write_config32(dev, GPIO_BASE, (GPIOBASE_ADDR | 1));
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@ -217,7 +217,7 @@ static void i82801dx_lpc_route_dma(struct device *dev, u8 mask)
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pci_write_config16(dev, PCI_DMA_CFG, reg16);
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pci_write_config16(dev, PCI_DMA_CFG, reg16);
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}
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}
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static void i82801dx_lpc_decode_en(device_t dev)
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static void i82801dx_lpc_decode_en(struct device *dev)
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{
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{
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/* Decode 0x3F8-0x3FF (COM1) for COMA port, 0x2F8-0x2FF (COM2) for COMB.
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/* Decode 0x3F8-0x3FF (COM1) for COMA port, 0x2F8-0x2FF (COM2) for COMB.
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* LPT decode defaults to 0x378-0x37F and 0x778-0x77F.
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* LPT decode defaults to 0x378-0x37F and 0x778-0x77F.
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@ -301,7 +301,7 @@ static void lpc_init(struct device *dev)
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enable_hpet(dev);
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enable_hpet(dev);
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}
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}
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static void i82801dx_lpc_read_resources(device_t dev)
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static void i82801dx_lpc_read_resources(struct device *dev)
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{
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{
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struct resource *res;
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struct resource *res;
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