mb/google/rex: Update FMD to support CBFS verification

This patch adds the required FMD changes to support the change
in cse_lite 'commit Ie0266e50463926b8d377825 ("remove
cbfs_unverified_area_map() API in cse_lite")' for CBFS verification.

These blobs were kept separate originally to avoid hash loading and
verification every time and hence save boot time.

With the change in cse_lite the ME_RW_A/B blobs are now part of
FW_MAIN_A/B and corresponding entries in FMD can be removed.

BUG=b:284382452
TEST=Build CB image for google/rex board and test CSE FW
update/downgrade with CONFIG_VBOOT_CBFS_INTEGRATION config enabled.
Also confirm there is no increase in boot time with this change.

Signed-off-by: Anil Kumar <anil.kumar.k@intel.com>
Change-Id: I56865a9e5c8b5f9e908e00e1a7e7e187d5d6a2f5
Reviewed-on: https://review.coreboot.org/c/coreboot/+/78487
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Jamie Ryu <jamie.m.ryu@intel.com>
Reviewed-by: Jérémy Compostella <jeremy.compostella@intel.com>
Reviewed-by: Julius Werner <jwerner@chromium.org>
This commit is contained in:
Anil Kumar 2023-10-19 10:46:57 -07:00 committed by Lean Sheng Tan
parent d81d80c554
commit 66fb5181e3
4 changed files with 0 additions and 24 deletions

View File

@ -8,7 +8,6 @@ FLASH 32M {
VBLOCK_A 8K VBLOCK_A 8K
FW_MAIN_A(CBFS) FW_MAIN_A(CBFS)
RW_FWID_A 64 RW_FWID_A 64
ME_RW_A(CBFS) 4000K
} }
RW_MISC 1M { RW_MISC 1M {
UNIFIED_MRC_CACHE(PRESERVE) 128K { UNIFIED_MRC_CACHE(PRESERVE) 128K {
@ -36,7 +35,6 @@ FLASH 32M {
VBLOCK_B 8K VBLOCK_B 8K
FW_MAIN_B(CBFS) FW_MAIN_B(CBFS)
RW_FWID_B 64 RW_FWID_B 64
ME_RW_B(CBFS) 4000K
} }
RW_LEGACY(CBFS) 1M RW_LEGACY(CBFS) 1M
RW_UNUSED 3M RW_UNUSED 3M

View File

@ -8,7 +8,6 @@ FLASH 32M {
VBLOCK_A 8K VBLOCK_A 8K
FW_MAIN_A(CBFS) FW_MAIN_A(CBFS)
RW_FWID_A 64 RW_FWID_A 64
ME_RW_A(CBFS) 4000K
} }
RW_MISC 1M { RW_MISC 1M {
UNIFIED_MRC_CACHE(PRESERVE) 128K { UNIFIED_MRC_CACHE(PRESERVE) 128K {
@ -36,7 +35,6 @@ FLASH 32M {
VBLOCK_B 8K VBLOCK_B 8K
FW_MAIN_B(CBFS) FW_MAIN_B(CBFS)
RW_FWID_B 64 RW_FWID_B 64
ME_RW_B(CBFS) 4000K
} }
RW_LEGACY(CBFS) 1M RW_LEGACY(CBFS) 1M
RW_UNUSED 4M RW_UNUSED 4M

View File

@ -8,11 +8,6 @@ FLASH 32M {
VBLOCK_A 8K VBLOCK_A 8K
FW_MAIN_A(CBFS) FW_MAIN_A(CBFS)
RW_FWID_A 64 RW_FWID_A 64
#if CONFIG_BOARD_GOOGLE_MODEL_REX_EC_ISH
ME_RW_A(CBFS) 4500K
#else
ME_RW_A(CBFS) 4400K
#endif
} }
# This section starts at the 16M boundary in SPI flash. # This section starts at the 16M boundary in SPI flash.
# MTL does not support a region crossing this boundary, # MTL does not support a region crossing this boundary,
@ -22,11 +17,6 @@ FLASH 32M {
VBLOCK_B 8K VBLOCK_B 8K
FW_MAIN_B(CBFS) FW_MAIN_B(CBFS)
RW_FWID_B 64 RW_FWID_B 64
#if CONFIG_BOARD_GOOGLE_MODEL_REX_EC_ISH
ME_RW_B(CBFS) 4500K
#else
ME_RW_B(CBFS) 4400K
#endif
} }
RW_MISC 1M { RW_MISC 1M {
UNIFIED_MRC_CACHE(PRESERVE) 128K { UNIFIED_MRC_CACHE(PRESERVE) 128K {

View File

@ -8,11 +8,6 @@ FLASH 32M {
VBLOCK_A 8K VBLOCK_A 8K
FW_MAIN_A(CBFS) FW_MAIN_A(CBFS)
RW_FWID_A 64 RW_FWID_A 64
#if CONFIG_BOARD_GOOGLE_MODEL_REX_EC_ISH
ME_RW_A(CBFS) 4500K
#else
ME_RW_A(CBFS) 4400K
#endif
} }
# This section starts at the 16M boundary in SPI flash. # This section starts at the 16M boundary in SPI flash.
# MTL does not support a region crossing this boundary, # MTL does not support a region crossing this boundary,
@ -22,11 +17,6 @@ FLASH 32M {
VBLOCK_B 8K VBLOCK_B 8K
FW_MAIN_B(CBFS) FW_MAIN_B(CBFS)
RW_FWID_B 64 RW_FWID_B 64
#if CONFIG_BOARD_GOOGLE_MODEL_REX_EC_ISH
ME_RW_B(CBFS) 4500K
#else
ME_RW_B(CBFS) 4400K
#endif
} }
RW_MISC 1M { RW_MISC 1M {
UNIFIED_MRC_CACHE(PRESERVE) 128K { UNIFIED_MRC_CACHE(PRESERVE) 128K {