From 670572ff6a4d0822df91c34114b7afdb21efd85c Mon Sep 17 00:00:00 2001 From: Subrata Banik Date: Mon, 25 Apr 2022 15:39:55 +0530 Subject: [PATCH] soc/intel/cmn/cse: Enforce CSE disabling MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit This patch enforces disabling of the CSE device if CSE stays in SOFT TEMP DISABLE state. The recommendation is to make CSE function disable to avoid receiving any CSE commands from the OS layer. BUG=b:228789015 TEST=None Signed-off-by: Subrata Banik Change-Id: I77c254195895a93a5606adee8b6f43d8b7100848 Reviewed-on: https://review.coreboot.org/c/coreboot/+/63822 Tested-by: build bot (Jenkins) Reviewed-by: Sridhar Siricilla Reviewed-by: Angel Pons Reviewed-by: Eric Lai --- src/soc/intel/common/block/cse/cse.c | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) diff --git a/src/soc/intel/common/block/cse/cse.c b/src/soc/intel/common/block/cse/cse.c index 64fd0412e2..d284a9d638 100644 --- a/src/soc/intel/common/block/cse/cse.c +++ b/src/soc/intel/common/block/cse/cse.c @@ -1203,7 +1203,8 @@ static void cse_set_state(struct device *dev) * 1. Send EOP to CSE if not done. * 2. Perform global reset lock. * 3. Put HECI1 to D0i3 and disable the HECI1 if the user selects - * DISABLE_HECI1_AT_PRE_BOOT config. + * DISABLE_HECI1_AT_PRE_BOOT config or CSE HFSTS1 Operation Mode is + * `Software Temporary Disable`. */ static void cse_final_ready_to_boot(void) { @@ -1212,7 +1213,7 @@ static void cse_final_ready_to_boot(void) cse_control_global_reset_lock(); - if (CONFIG(DISABLE_HECI1_AT_PRE_BOOT)) { + if (CONFIG(DISABLE_HECI1_AT_PRE_BOOT) || cse_is_hfs1_com_soft_temp_disable()) { cse_set_to_d0i3(); heci1_disable(); }