soc/intel/tigerlake: Clean up FSP chipset lockdown configuration
Use a variable to store if the FSP should be responsible for the chipset lockdown and use it for setting related configuration options. Thus, get rid of that if-else-clause. Change-Id: I0580fb3ec9daafac273dcb091f48ce403c22e8f8 Signed-off-by: Felix Singer <felixsinger@posteo.net> Reviewed-on: https://review.coreboot.org/c/coreboot/+/52844 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com> Reviewed-by: Michael Niewöhner <foss@mniewoehner.de>
This commit is contained in:
parent
5385b4daa8
commit
673e6d1c67
|
@ -393,17 +393,11 @@ void platform_fsp_silicon_init_params_cb(FSPS_UPD *supd)
|
||||||
params->DisableTccoldOnUsbConnected = 1;
|
params->DisableTccoldOnUsbConnected = 1;
|
||||||
|
|
||||||
/* Chipset Lockdown */
|
/* Chipset Lockdown */
|
||||||
if (get_lockdown_config() == CHIPSET_LOCKDOWN_COREBOOT) {
|
const bool lockdown_by_fsp = get_lockdown_config() == CHIPSET_LOCKDOWN_FSP;
|
||||||
params->PchLockDownGlobalSmi = 0;
|
params->PchLockDownGlobalSmi = lockdown_by_fsp;
|
||||||
params->PchLockDownBiosInterface = 0;
|
params->PchLockDownBiosInterface = lockdown_by_fsp;
|
||||||
params->PchUnlockGpioPads = 1;
|
params->PchUnlockGpioPads = !lockdown_by_fsp;
|
||||||
params->RtcMemoryLock = 0;
|
params->RtcMemoryLock = lockdown_by_fsp;
|
||||||
} else {
|
|
||||||
params->PchLockDownGlobalSmi = 1;
|
|
||||||
params->PchLockDownBiosInterface = 1;
|
|
||||||
params->PchUnlockGpioPads = 0;
|
|
||||||
params->RtcMemoryLock = 1;
|
|
||||||
}
|
|
||||||
|
|
||||||
/* coreboot will send EOP before loading payload */
|
/* coreboot will send EOP before loading payload */
|
||||||
params->EndOfPostMessage = EOP_DISABLE;
|
params->EndOfPostMessage = EOP_DISABLE;
|
||||||
|
|
Loading…
Reference in New Issue