mb/google/dedede: Create boxy variant
Create the boxy variant of the waddledee reference board by copying the template files to a new directory named for the variant. (Auto-Generated by create_coreboot_variant.sh version 4.5.0). BUG=b:277529068 BRANCH=None TEST=util/abuild/abuild -p none -t google/dedede -x -a make sure the build includes GOOGLE_BOXY Change-ID: Ief22eb000421c23abf6de3f99eb860bdae1e7919 Signed-off-by: kevin3.yang <kevin3.yang@lcfc.corp-partner.google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/74536 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Derek Huang <derekhuang@google.com> Reviewed-by: Eric Lai <eric_lai@quanta.corp-partner.google.com>
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@ -115,6 +115,7 @@ config MAINBOARD_PART_NUMBER
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default "Beadrix" if BOARD_GOOGLE_BEADRIX
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default "Shotzo" if BOARD_GOOGLE_SHOTZO
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default "Taranza" if BOARD_GOOGLE_TARANZA
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default "Boxy" if BOARD_GOOGLE_BOXY
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config MAX_CPUS
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int
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@ -156,6 +157,7 @@ config VARIANT_DIR
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default "beadrix" if BOARD_GOOGLE_BEADRIX
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default "shotzo" if BOARD_GOOGLE_SHOTZO
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default "taranza" if BOARD_GOOGLE_TARANZA
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default "boxy" if BOARD_GOOGLE_BOXY
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endif #BOARD_GOOGLE_BASEBOARD_DEDEDE
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@ -205,3 +205,10 @@ config BOARD_GOOGLE_SHOTZO
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config BOARD_GOOGLE_TARANZA
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bool "-> Taranza"
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select BOARD_GOOGLE_BASEBOARD_DEDEDE_CR50
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config BOARD_GOOGLE_BOXY
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bool "-> Boxy"
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select BOARD_GOOGLE_BASEBOARD_DEDEDE_CR50
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select RT8168_GEN_ACPI_POWER_RESOURCE
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select RT8168_GET_MAC_FROM_VPD
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select RT8168_SET_LED_MODE
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@ -0,0 +1,8 @@
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/* SPDX-License-Identifier: GPL-2.0-or-later */
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#ifndef MAINBOARD_EC_H
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#define MAINBOARD_EC_H
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#include <baseboard/ec.h>
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#endif
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@ -0,0 +1,8 @@
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/* SPDX-License-Identifier: GPL-2.0-or-later */
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#ifndef MAINBOARD_GPIO_H
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#define MAINBOARD_GPIO_H
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#include <baseboard/gpio.h>
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#endif /* MAINBOARD_GPIO_H */
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@ -0,0 +1,5 @@
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# SPDX-License-Identifier: GPL-2.0-or-later
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# This is an auto-generated file. Do not edit!!
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# Add memory parts in mem_parts_used.txt and run spd_tools to regenerate.
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SPD_SOURCES = placeholder
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@ -0,0 +1 @@
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DRAM Part Name ID to assign
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@ -0,0 +1,11 @@
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# This is a CSV file containing a list of memory parts used by this variant.
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# One part per line with an optional fixed ID in column 2.
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# Only include a fixed ID if it is required for legacy reasons!
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# Generated IDs are dependent on the order of parts in this file,
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# so new parts must always be added at the end of the file!
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#
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# Generate an updated Makefile.inc and dram_id.generated.txt by running the
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# part_id_gen tool from util/spd_tools.
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# See util/spd_tools/README.md for more details and instructions.
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# Part Name
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@ -0,0 +1,42 @@
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chip soc/intel/jasperlake
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# Intel Common SoC Config
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#+-------------------+---------------------------+
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#| Field | Value |
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#+-------------------+---------------------------+
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#| GSPI0 | cr50 TPM. Early init is |
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#| | required to set up a BAR |
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#| | for TPM communication |
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#| | before memory is up |
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#| I2C0 | Trackpad |
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#| I2C1 | Digitizer |
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#| I2C2 | Touchscreen |
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#| I2C3 | Camera |
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#| I2C4 | Audio |
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#+-------------------+---------------------------+
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register "common_soc_config" = "{
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.gspi[0] = {
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.speed_mhz = 1,
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.early_init = 1,
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},
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.i2c[0] = {
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.speed = I2C_SPEED_FAST,
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},
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.i2c[1] = {
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.speed = I2C_SPEED_FAST,
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},
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.i2c[2] = {
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.speed = I2C_SPEED_FAST,
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},
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.i2c[3] = {
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.speed = I2C_SPEED_FAST,
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},
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.i2c[4] = {
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.speed = I2C_SPEED_FAST,
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},
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}"
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device domain 0 on
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device pci 15.0 on end
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end
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end
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