GNUBoot
/
coreboot-kgpe-d16
2
0
Fork 0
Code Issues Pull Requests Packages Projects Releases Wiki Activity

Remove: 

- CONFIG_CBFS
- anything that's conditional on CONFIG_CBFS == 0
- files that were only included for CONFIG_CBFS == 0
In particular:
- elfboot
- stream boot code
- mini-filo and filesystems (depends on stream boot code)

After this commit, there is no way to build an image that is not using
CBFS anymore.

Signed-off-by: Patrick Georgi <patrick.georgi@coresystems.de>
Acked-by: Myles Watson <mylesgw@gmail.com>
Acked-by: Stefan Reinauer <stepan@coresystems.de>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4712 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
This commit is contained in:
Patrick Georgi 2009-10-03 16:24:58 +00:00
parent 8f3ec7b1a3
commit 6768f39a4b
150 changed files with 41 additions and 4723 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

4
src/Kconfig
View File

@ -36,10 +36,6 @@ source src/southbridge/Kconfig
source src/superio/Kconfig
source src/cpu/Kconfig
config CBFS
bool
default y
config PCI_BUS_SEGN_BITS
int
default 0

41
src/arch/i386/Config.lb
View File

@ -1,45 +1,29 @@
uses CONFIG_CBFS
uses CONFIG_SMP
uses CONFIG_PRECOMPRESSED_PAYLOAD
uses CONFIG_USE_INIT
uses CONFIG_HAVE_FAILOVER_BOOT
uses CONFIG_USE_FAILOVER_IMAGE
uses CONFIG_USE_FALLBACK_IMAGE
uses CONFIG_CBFS
init init/crt0.S.lb
if CONFIG_CBFS
if CONFIG_USE_FAILOVER_IMAGE
else
initobject /src/lib/cbfs.o
initobject /src/lib/lzma.o
end
if CONFIG_USE_FAILOVER_IMAGE
else
initobject /src/lib/cbfs.o
initobject /src/lib/lzma.o
end
if CONFIG_HAVE_FAILOVER_BOOT
if CONFIG_USE_FAILOVER_IMAGE
ldscript init/ldscript_failover.lb
else
if CONFIG_CBFS
ldscript init/ldscript_cbfs.lb
else
ldscript init/ldscript.lb
end
end
else
if CONFIG_CBFS
if CONFIG_USE_FALLBACK_IMAGE
ldscript init/ldscript_fallback_cbfs.lb
else
ldscript init/ldscript_cbfs.lb
end
if CONFIG_USE_FALLBACK_IMAGE
ldscript init/ldscript_fallback_cbfs.lb
else
if CONFIG_USE_FALLBACK_IMAGE
ldscript init/ldscript_fallback.lb
else
ldscript init/ldscript.lb
end
ldscript init/ldscript_cbfs.lb
end
end
@ -82,13 +66,6 @@ end
# catch the case where there is no compression
makedefine PAYLOAD-1:=payload
if CONFIG_CBFS
else
# match the case where a compression type is specified.
makedefine PAYLOAD-$(CONFIG_COMPRESSED_PAYLOAD_NRV2B):=payload.nrv2b
makedefine PAYLOAD-$(CONFIG_COMPRESSED_PAYLOAD_LZMA):=payload.lzma
end
# catch the case where there is precompression. Yes, this bites.
if CONFIG_PRECOMPRESSED_PAYLOAD
makedefine PAYLOAD-1:=payload
@ -105,8 +82,8 @@ if CONFIG_USE_FAILOVER_IMAGE
else
makerule coreboot.rom
depends "coreboot.strip buildrom $(PAYLOAD-1)"
action "PAYLOAD=$(PAYLOAD-1); if [ $(CONFIG_CBFS) -eq 1 ]; then PAYLOAD=/dev/null; touch cbfs-support; fi; ./buildrom $< $@ $$PAYLOAD $(CONFIG_ROM_IMAGE_SIZE) $(CONFIG_ROM_SECTION_SIZE)"
action "if [ $(CONFIG_COMPRESSED_PAYLOAD_LZMA) -eq 1 -a $(CONFIG_CBFS) -eq 1 ]; then echo l > cbfs-support; fi"
action "touch cbfs-support; ./buildrom $< $@ /dev/null $(CONFIG_ROM_IMAGE_SIZE) $(CONFIG_ROM_SECTION_SIZE)"
action "if [ $(CONFIG_COMPRESSED_PAYLOAD_LZMA) -eq 1 ]; then echo l > cbfs-support; fi"
end
end

17
src/arch/i386/init/crt0.S.lb
View File

@ -74,19 +74,8 @@ __main:
movl $0x4000000, %esp
movl %esp, %ebp
pushl %esi
#if CONFIG_CBFS == 1
pushl $str_coreboot_ram_name
call cbfs_and_run_core
#else
movl $_liseg, %esi
movl $_iseg, %edi
movl $_eiseg, %ecx
subl %edi, %ecx
pushl %ecx
pushl %edi
pushl %esi
call copy_and_run_core
#endif
.Lhlt:
intel_chip_post_macro(0xee) /* post fe */
@ -148,12 +137,10 @@ str_pre_main: .string "Jumping to coreboot.\r\n"
#endif /* ASM_CONSOLE_LOGLEVEL > BIOS_DEBUG */
#if CONFIG_CBFS == 1
# if CONFIG_USE_FALLBACK_IMAGE == 1
#if CONFIG_USE_FALLBACK_IMAGE == 1
str_coreboot_ram_name: .string "fallback/coreboot_ram"
# else
#else
str_coreboot_ram_name: .string "normal/coreboot_ram"
# endif
#endif
#endif /* CONFIG_USE_DCACHE_RAM */

70
src/arch/i386/init/ldscript.lb
View File

@ -1,70 +0,0 @@
/*
* Memory map:
*
* CONFIG_RAMBASE
* : data segment
* : bss segment
* : heap
* : stack
* CONFIG_ROMBASE
* : coreboot text
* : readonly text
*/
/*
* Bootstrap code for the STPC Consumer
* Copyright (c) 1999 by Net Insight AB. All Rights Reserved.
*
*/
/*
* Written by Johan Rydberg, based on work by Daniel Kahlin.
* Rewritten by Eric Biederman
*/
/*
* We use ELF as output format. So that we can
* debug the code in some form.
*/
OUTPUT_FORMAT("elf32-i386", "elf32-i386", "elf32-i386")
OUTPUT_ARCH(i386)
/*
ENTRY(_start)
*/
TARGET(binary)
INPUT(coreboot_ram.rom)
SECTIONS
{
. = CONFIG_ROMBASE;
.ram . : {
_ram = . ;
coreboot_ram.rom(*)
_eram = . ;
}
/* This section might be better named .setup */
.rom . : {
_rom = .;
*(.rom.text);
*(.rom.data);
*(.rodata.*);
*(.rom.data.*);
. = ALIGN(16);
_erom = .;
}
_lrom = LOADADDR(.rom);
_elrom = LOADADDR(.rom) + SIZEOF(.rom);
_iseg = CONFIG_RAMBASE;
_eiseg = _iseg + SIZEOF(.ram);
_liseg = _ram;
_eliseg = _eram;
/DISCARD/ : {
*(.comment)
*(.comment.*)
*(.note)
*(.note.*)
}
}

75
src/arch/i386/init/ldscript_fallback.lb
View File

@ -1,75 +0,0 @@
/*
* Memory map:
*
* CONFIG_RAMBASE
* : data segment
* : bss segment
* : heap
* : stack
* CONFIG_ROMBASE
* : coreboot text
* : readonly text
*/
/*
* Bootstrap code for the STPC Consumer
* Copyright (c) 1999 by Net Insight AB. All Rights Reserved.
*
*/
/*
* Written by Johan Rydberg, based on work by Daniel Kahlin.
* Rewritten by Eric Biederman
*/
/*
* We use ELF as output format. So that we can
* debug the code in some form.
*/
OUTPUT_FORMAT("elf32-i386", "elf32-i386", "elf32-i386")
OUTPUT_ARCH(i386)
/*
ENTRY(_start)
*/
TARGET(binary)
INPUT(coreboot_ram.rom)
SECTIONS
{
. = CONFIG_ROMBASE;
.ram . : {
_ram = . ;
coreboot_ram.rom(*)
_eram = . ;
}
/* cut _start into last 64k*/
_x = .;
. = (_x < (CONFIG_ROMBASE - 0x10000 + CONFIG_ROM_IMAGE_SIZE)) ? (CONFIG_ROMBASE - 0x10000 + CONFIG_ROM_IMAGE_SIZE) : _x;
/* This section might be better named .setup */
.rom . : {
_rom = .;
*(.rom.text);
*(.rom.data);
*(.init.rodata.*);
*(.rodata.*);
*(.rom.data.*);
. = ALIGN(16);
_erom = .;
}
_lrom = LOADADDR(.rom);
_elrom = LOADADDR(.rom) + SIZEOF(.rom);
_iseg = CONFIG_RAMBASE;
_eiseg = _iseg + SIZEOF(.ram);
_liseg = _ram;
_eliseg = _eram;
/DISCARD/ : {
*(.comment)
*(.note)
*(.comment.*)
*(.note.*)
}
}

7
src/arch/i386/lib/Config.lb
View File

@ -1,7 +1,6 @@
uses CONFIG_USE_INIT
uses CONFIG_USE_PRINTK_IN_CAR
uses CONFIG_USE_FAILOVER_IMAGE
uses CONFIG_CBFS
object c_start.S
object cpu.c
@ -15,9 +14,5 @@ initobject printk_init.o
if CONFIG_USE_FAILOVER_IMAGE
else
if CONFIG_CBFS
initobject cbfs_and_run.o
else
initobject copy_and_run.o
end
initobject cbfs_and_run.o
end

53
src/arch/i386/lib/copy_and_run.c
View File

@ -1,53 +0,0 @@
/* by yhlu 6.2005
moved from nrv2v.c and some lines from crt0.S
2006/05/02 - stepan: move nrv2b to an extra file.
*/
#include <console/console.h>
#include <stdint.h>
#include <string.h>
#if CONFIG_COMPRESS
#define ENDIAN 0
#define BITSIZE 32
#include "../lib/nrv2b.c"
#endif
void copy_and_run_core(u8 *src, u8 *dst, unsigned long ilen, unsigned ebp)
{
unsigned long olen;
#if CONFIG_USE_INIT
printk_spew("src=%08x\r\n",src);
printk_spew("dst=%08x\r\n",dst);
#else
print_spew("src="); print_spew_hex32((uint32_t)src); print_spew("\r\n");
print_spew("dst="); print_spew_hex32((uint32_t)dst); print_spew("\r\n");
#endif
#if !CONFIG_COMPRESS
print_debug("Copying image to RAM.\r\n");
memcpy(src, dst, ilen);
olen = ilen;
#else
print_debug("Uncompressing image to RAM.\r\n");
// dump_mem(src, src+0x100);
olen = unrv2b(src, dst, &ilen);
#endif
// dump_mem(dst, dst+0x100);
#if CONFIG_USE_INIT
printk_spew("image length = %08x\r\n", olen);
#else
print_spew("image length = "); print_spew_hex32(olen); print_spew("\r\n");
#endif
print_debug("Jumping to image.\r\n");
__asm__ volatile (
"movl %%eax, %%ebp\n\t"
"cli\n\t"
"jmp *%%edi\n\t"
:: "a"(ebp), "D"(dst)
);
}

7
src/arch/ppc/Config.lb
View File

@ -1,4 +1,3 @@
uses CONFIG_CBFS
ldscript init/ldscript.lb
makerule coreboot.strip
@ -11,10 +10,8 @@ makerule coreboot.rom
action "cp $< $@"
end
if CONFIG_CBFS
initobject /src/lib/cbfs.o
initobject /src/lib/lzma.o
end
initobject /src/lib/cbfs.o
initobject /src/lib/lzma.o
dir init
dir lib

9
src/boot/Config.lb
View File

@ -1,9 +1,2 @@
object hardwaremain.o
if CONFIG_CBFS
object selfboot.o
else
object elfboot.o
end
if CONFIG_FS_PAYLOAD
object filo.o
end
object selfboot.o

687
src/boot/elfboot.c
View File

@ -1,687 +0,0 @@
/*
* This file is part of the coreboot project.
*
* Copyright (C) 2003 Eric W. Biederman <ebiederm@xmission.com>
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; version 2 of the License.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA, 02110-1301 USA
*/
#include <console/console.h>
#include <part/fallback_boot.h>
#include <boot/elf.h>
#include <boot/elf_boot.h>
#include <boot/coreboot_tables.h>
#include <ip_checksum.h>
#include <stream/read_bytes.h>
#include <stdint.h>
#include <stdlib.h>
#include <string.h>
/* Maximum physical address we can use for the coreboot bounce buffer.
*/
#ifndef MAX_ADDR
#define MAX_ADDR -1UL
#endif
extern unsigned char _ram_seg;
extern unsigned char _eram_seg;
struct segment {
struct segment *next;
struct segment *prev;
struct segment *phdr_next;
struct segment *phdr_prev;
unsigned long s_addr;
unsigned long s_memsz;
unsigned long s_offset;
unsigned long s_filesz;
};
struct verify_callback {
struct verify_callback *next;
int (*callback)(struct verify_callback *vcb,
Elf_ehdr *ehdr, Elf_phdr *phdr, struct segment *head);
unsigned long desc_offset;
unsigned long desc_addr;
};
struct ip_checksum_vcb {
struct verify_callback data;
unsigned short ip_checksum;
};
int verify_ip_checksum(
struct verify_callback *vcb,
Elf_ehdr *ehdr, Elf_phdr *phdr, struct segment *head)
{
struct ip_checksum_vcb *cb;
struct segment *ptr;
unsigned long bytes;
unsigned long checksum;
unsigned char buff[2], *n_desc;
cb = (struct ip_checksum_vcb *)vcb;
/* zero the checksum so it's value won't
* get in the way of verifying the checksum.
*/
n_desc = 0;
if (vcb->desc_addr) {
n_desc = (unsigned char *)(vcb->desc_addr);
memcpy(buff, n_desc, 2);
memset(n_desc, 0, 2);
}
bytes = 0;
checksum = compute_ip_checksum(ehdr, sizeof(*ehdr));
bytes += sizeof(*ehdr);
checksum = add_ip_checksums(bytes, checksum,
compute_ip_checksum(phdr, ehdr->e_phnum*sizeof(*phdr)));
bytes += ehdr->e_phnum*sizeof(*phdr);
for(ptr = head->phdr_next; ptr != head; ptr = ptr->phdr_next) {
checksum = add_ip_checksums(bytes, checksum,
compute_ip_checksum((void *)ptr->s_addr, ptr->s_memsz));
bytes += ptr->s_memsz;
}
if (n_desc != 0) {
memcpy(n_desc, buff, 2);
}
if (checksum != cb->ip_checksum) {
printk_err("Image checksum: %04x != computed checksum: %04lx\n",
cb->ip_checksum, checksum);
}
return checksum == cb->ip_checksum;
}
/* The problem:
* Static executables all want to share the same addresses
* in memory because only a few addresses are reliably present on
* a machine, and implementing general relocation is hard.
*
* The solution:
* - Allocate a buffer the size of the coreboot image plus additional
* required space.
* - Anything that would overwrite coreboot copy into the lower part of
* the buffer.
* - After loading an ELF image copy coreboot to the top of the buffer.
* - Then jump to the loaded image.
*
* Benefits:
* - Nearly arbitrary standalone executables can be loaded.
* - Coreboot is preserved, so it can be returned to.
* - The implementation is still relatively simple,
* and much simpler then the general case implemented in kexec.
*
*/
static unsigned long bounce_size;
static unsigned long get_bounce_buffer(struct lb_memory *mem)
{
unsigned long lb_size;
unsigned long mem_entries;
unsigned long buffer;
int i;
lb_size = (unsigned long)(&_eram_seg - &_ram_seg);
/* Double coreboot size so I have somewhere to place a copy to return to */
bounce_size = lb_size;
lb_size = bounce_size + lb_size;
mem_entries = (mem->size - sizeof(*mem))/sizeof(mem->map[0]);
buffer = 0;
for(i = 0; i < mem_entries; i++) {
unsigned long mstart, mend;
unsigned long msize;
unsigned long tbuffer;
if (mem->map[i].type != LB_MEM_RAM)
continue;
if (unpack_lb64(mem->map[i].start) > MAX_ADDR)
continue;
if (unpack_lb64(mem->map[i].size) < lb_size)
continue;
mstart = unpack_lb64(mem->map[i].start);
msize = MAX_ADDR - mstart +1;
if (msize > unpack_lb64(mem->map[i].size))
msize = unpack_lb64(mem->map[i].size);
mend = mstart + msize;
tbuffer = mend - lb_size;
if (tbuffer < buffer)
continue;
buffer = tbuffer;
}
return buffer;
}
static struct verify_callback *process_elf_notes(
unsigned char *header,
unsigned long offset, unsigned long length)
{
struct verify_callback *cb_chain;
unsigned char *note, *end;
unsigned char *program, *version;
cb_chain = 0;
note = header + offset;
end = note + length;
program = version = 0;
while(note < end) {
Elf_Nhdr *hdr;
unsigned char *n_name, *n_desc, *next;
hdr = (Elf_Nhdr *)note;
n_name = note + sizeof(*hdr);
n_desc = n_name + ((hdr->n_namesz + 3) & ~3);
next = n_desc + ((hdr->n_descsz + 3) & ~3);
if (next > end) {
break;
}
if ((hdr->n_namesz == sizeof(ELF_NOTE_BOOT)) &&
(memcmp(n_name, ELF_NOTE_BOOT, sizeof(ELF_NOTE_BOOT)) == 0)) {
switch(hdr->n_type) {
case EIN_PROGRAM_NAME:
if (n_desc[hdr->n_descsz -1] == 0) {
program = n_desc;
}
break;
case EIN_PROGRAM_VERSION:
if (n_desc[hdr->n_descsz -1] == 0) {
version = n_desc;
}
break;
case EIN_PROGRAM_CHECKSUM:
{
struct ip_checksum_vcb *cb;
cb = malloc(sizeof(*cb));
cb->ip_checksum = *((uint16_t *)n_desc);
cb->data.callback = verify_ip_checksum;
cb->data.next = cb_chain;
cb->data.desc_offset = n_desc - header;
cb_chain = &cb->data;
break;
}
}
}
printk_spew("n_type: %08x n_name(%d): %-*.*s n_desc(%d): %-*.*s\n",
hdr->n_type,
hdr->n_namesz, hdr->n_namesz, hdr->n_namesz, n_name,
hdr->n_descsz,hdr->n_descsz, hdr->n_descsz, n_desc);
note = next;
}
if (program && version) {
printk_info("Loading %s version: %s\n",
program, version);
}
return cb_chain;
}
static int valid_area(struct lb_memory *mem, unsigned long buffer,
unsigned long start, unsigned long len)
{
/* Check through all of the memory segments and ensure
* the segment that was passed in is completely contained
* in RAM.
*/
int i;
unsigned long end = start + len;
unsigned long mem_entries = (mem->size - sizeof(*mem))/sizeof(mem->map[0]);
/* See if I conflict with the bounce buffer */
if (end >= buffer) {
return 0;
}
/* Walk through the table of valid memory ranges and see if I
* have a match.
*/
for(i = 0; i < mem_entries; i++) {
uint64_t mstart, mend;
uint32_t mtype;
mtype = mem->map[i].type;
mstart = unpack_lb64(mem->map[i].start);
mend = mstart + unpack_lb64(mem->map[i].size);
if ((mtype == LB_MEM_RAM) && (start < mend) && (end > mstart)) {
break;
}
if ((mtype == LB_MEM_TABLE) && (start < mend) && (end > mstart)) {
printk_err("Payload is overwriting Coreboot tables.\n");
break;
}
}
if (i == mem_entries) {
printk_err("No matching ram area found for range:\n");
printk_err(" [0x%016lx, 0x%016lx)\n", start, end);
printk_err("Ram areas\n");
for(i = 0; i < mem_entries; i++) {
uint64_t mstart, mend;
uint32_t mtype;
mtype = mem->map[i].type;
mstart = unpack_lb64(mem->map[i].start);
mend = mstart + unpack_lb64(mem->map[i].size);
printk_err(" [0x%016lx, 0x%016lx) %s\n",
(unsigned long)mstart,
(unsigned long)mend,
(mtype == LB_MEM_RAM)?"RAM":"Reserved");
}
return 0;
}
return 1;
}
static void relocate_segment(unsigned long buffer, struct segment *seg)
{
/* Modify all segments that want to load onto coreboot
* to load onto the bounce buffer instead.
*/
unsigned long lb_start = (unsigned long)&_ram_seg;
unsigned long lb_end = (unsigned long)&_eram_seg;
unsigned long start, middle, end;
printk_spew("lb: [0x%016lx, 0x%016lx)\n",
lb_start, lb_end);
start = seg->s_addr;
middle = start + seg->s_filesz;
end = start + seg->s_memsz;
/* I don't conflict with coreboot so get out of here */
if ((end <= lb_start) || (start >= lb_end))
return;
printk_spew("segment: [0x%016lx, 0x%016lx, 0x%016lx)\n",
start, middle, end);
/* Slice off a piece at the beginning
* that doesn't conflict with coreboot.
*/
if (start < lb_start) {
struct segment *new;
unsigned long len = lb_start - start;
new = malloc(sizeof(*new));
*new = *seg;
new->s_memsz = len;
seg->s_memsz -= len;
seg->s_addr += len;
seg->s_offset += len;
if (seg->s_filesz > len) {
new->s_filesz = len;
seg->s_filesz -= len;
} else {
seg->s_filesz = 0;
}
/* Order by stream offset */
new->next = seg;
new->prev = seg->prev;
seg->prev->next = new;
seg->prev = new;
/* Order by original program header order */
new->phdr_next = seg;
new->phdr_prev = seg->phdr_prev;
seg->phdr_prev->phdr_next = new;
seg->phdr_prev = new;
/* compute the new value of start */
start = seg->s_addr;
printk_spew(" early: [0x%016lx, 0x%016lx, 0x%016lx)\n",
new->s_addr,
new->s_addr + new->s_filesz,
new->s_addr + new->s_memsz);
}
/* Slice off a piece at the end
* that doesn't conflict with coreboot
*/
if (end > lb_end) {
unsigned long len = lb_end - start;
struct segment *new;
new = malloc(sizeof(*new));
*new = *seg;
seg->s_memsz = len;
new->s_memsz -= len;
new->s_addr += len;
new->s_offset += len;
if (seg->s_filesz > len) {
seg->s_filesz = len;
new->s_filesz -= len;
} else {
new->s_filesz = 0;
}
/* Order by stream offset */
new->next = seg->next;
new->prev = seg;
seg->next->prev = new;
seg->next = new;
/* Order by original program header order */
new->phdr_next = seg->phdr_next;
new->phdr_prev = seg;
seg->phdr_next->phdr_prev = new;
seg->phdr_next = new;
printk_spew(" late: [0x%016lx, 0x%016lx, 0x%016lx)\n",
new->s_addr,
new->s_addr + new->s_filesz,
new->s_addr + new->s_memsz);
}
/* Now retarget this segment onto the bounce buffer */
seg->s_addr = buffer + (seg->s_addr - lb_start);
printk_spew(" bounce: [0x%016lx, 0x%016lx, 0x%016lx)\n",
seg->s_addr,
seg->s_addr + seg->s_filesz,
seg->s_addr + seg->s_memsz);
}
static int build_elf_segment_list(
struct segment *head,
unsigned long bounce_buffer, struct lb_memory *mem,
Elf_phdr *phdr, int headers)
{
struct segment *ptr;
int i;
memset(head, 0, sizeof(*head));
head->phdr_next = head->phdr_prev = head;
head->next = head->prev = head;
for(i = 0; i < headers; i++) {
struct segment *new;
/* Ignore data that I don't need to handle */
if (phdr[i].p_type != PT_LOAD) {
printk_debug("Dropping non PT_LOAD segment\n");
continue;
}
if (phdr[i].p_memsz == 0) {
printk_debug("Dropping empty segment\n");
continue;
}
new = malloc(sizeof(*new));
new->s_addr = phdr[i].p_paddr;
new->s_memsz = phdr[i].p_memsz;
new->s_offset = phdr[i].p_offset;
new->s_filesz = phdr[i].p_filesz;
printk_debug("New segment addr 0x%lx size 0x%lx offset 0x%lx filesize 0x%lx\n",
new->s_addr, new->s_memsz, new->s_offset, new->s_filesz);
/* Clean up the values */
if (new->s_filesz > new->s_memsz) {
new->s_filesz = new->s_memsz;
}
printk_debug("(cleaned up) New segment addr 0x%lx size 0x%lx offset 0x%lx filesize 0x%lx\n",
new->s_addr, new->s_memsz, new->s_offset, new->s_filesz);
for(ptr = head->next; ptr != head; ptr = ptr->next) {
if (new->s_offset < ptr->s_offset)
break;
}
/* Order by stream offset */
new->next = ptr;
new->prev = ptr->prev;
ptr->prev->next = new;
ptr->prev = new;
/* Order by original program header order */
new->phdr_next = head;
new->phdr_prev = head->phdr_prev;
head->phdr_prev->phdr_next = new;
head->phdr_prev = new;
/* Verify the memory addresses in the segment are valid */
if (!valid_area(mem, bounce_buffer, new->s_addr, new->s_memsz))
goto out;
/* Modify the segment to load onto the bounce_buffer if necessary.
*/
relocate_segment(bounce_buffer, new);
}
return 1;
out:
return 0;
}
static int load_elf_segments(
struct segment *head, unsigned char *header, unsigned long header_size)
{
unsigned long offset;
struct segment *ptr;
offset = 0;
for(ptr = head->next; ptr != head; ptr = ptr->next) {
unsigned long start_offset;
unsigned long skip_bytes, read_bytes;
unsigned char *dest, *middle, *end;
byte_offset_t result;
printk_debug("Loading Segment: addr: 0x%016lx memsz: 0x%016lx filesz: 0x%016lx\n",
ptr->s_addr, ptr->s_memsz, ptr->s_filesz);
/* Compute the boundaries of the segment */
dest = (unsigned char *)(ptr->s_addr);
end = dest + ptr->s_memsz;
middle = dest + ptr->s_filesz;
start_offset = ptr->s_offset;
/* Ignore s_offset if I have a pure bss segment */
if (ptr->s_filesz == 0) {
start_offset = offset;
}
printk_spew("[ 0x%016lx, %016lx, 0x%016lx) <- %016lx\n",
(unsigned long)dest,
(unsigned long)middle,
(unsigned long)end,
(unsigned long)start_offset);
/* Skip intial buffer unused bytes */
if (offset < header_size) {
if (start_offset < header_size) {
offset = start_offset;
} else {
offset = header_size;
}
}
/* Skip the unused bytes */
skip_bytes = start_offset - offset;
if (skip_bytes &&
((result = stream_skip(skip_bytes)) != skip_bytes)) {
printk_err("ERROR: Skip of %ld bytes skipped %ld bytes\n",
skip_bytes, result);
goto out;
}
offset = start_offset;
/* Copy data from the initial buffer */
if (offset < header_size) {
size_t len;
if ((ptr->s_filesz + start_offset) > header_size) {
len = header_size - start_offset;
}
else {
len = ptr->s_filesz;
}
memcpy(dest, &header[start_offset], len);
dest += len;
}
/* Read the segment into memory */
read_bytes = middle - dest;
if (read_bytes &&
((result = stream_read(dest, read_bytes)) != read_bytes)) {
printk_err("ERROR: Read of %ld bytes read %ld bytes...\n",
read_bytes, result);
goto out;
}
offset += ptr->s_filesz;
/* Zero the extra bytes between middle & end */
if (middle < end) {
printk_debug("Clearing Segment: addr: 0x%016lx memsz: 0x%016lx\n",
(unsigned long)middle, (unsigned long)(end - middle));
/* Zero the extra bytes */
memset(middle, 0, end - middle);
}
}
return 1;
out:
return 0;
}
static int verify_loaded_image(
struct verify_callback *vcb,
Elf_ehdr *ehdr, Elf_phdr *phdr,
struct segment *head
)
{
struct segment *ptr;
int ok;
ok = 1;
for(; ok && vcb ; vcb = vcb->next) {
/* Find where the note is loaded */
/* The whole note must be loaded intact
* so an address of 0 for the descriptor is impossible
*/
vcb->desc_addr = 0;
for(ptr = head->next; ptr != head; ptr = ptr->next) {
unsigned long desc_addr;
desc_addr = ptr->s_addr + vcb->desc_offset - ptr->s_offset;
if ((desc_addr >= ptr->s_addr) &&
(desc_addr < (ptr->s_addr + ptr->s_filesz))) {
vcb->desc_addr = desc_addr;
}
}
ok = vcb->callback(vcb, ehdr, phdr, head);
}
return ok;
}
int elfload(struct lb_memory *mem,
unsigned char *header, unsigned long header_size)
{
Elf_ehdr *ehdr;
Elf_phdr *phdr;
void *entry;
struct segment head;
struct verify_callback *cb_chain;
unsigned long bounce_buffer;
/* Find a bounce buffer so I can load to coreboot's current location */
bounce_buffer = get_bounce_buffer(mem);
if (!bounce_buffer) {
printk_err("Could not find a bounce buffer...\n");
goto out;
}
ehdr = (Elf_ehdr *)header;
entry = (void *)(ehdr->e_entry);
phdr = (Elf_phdr *)(&header[ehdr->e_phoff]);
/* Digest elf note information... */
cb_chain = 0;
if ((phdr[0].p_type == PT_NOTE) &&
((phdr[0].p_offset + phdr[0].p_filesz) < header_size)) {
cb_chain = process_elf_notes(header,
phdr[0].p_offset, phdr[0].p_filesz);
}
/* Preprocess the elf segments */
if (!build_elf_segment_list(&head,
bounce_buffer, mem, phdr, ehdr->e_phnum))
goto out;
/* Load the segments */
if (!load_elf_segments(&head, header, header_size))
goto out;
printk_spew("Loaded segments\n");
/* Verify the loaded image */
if (!verify_loaded_image(cb_chain, ehdr, phdr, &head))
goto out;
printk_spew("verified segments\n");
/* Shutdown the stream device */
stream_fini();
printk_spew("closed down stream\n");
/* Reset to booting from this image as late as possible */
boot_successful();
printk_debug("Jumping to boot code at %p\n", entry);
post_code(0xfe);
/* Jump to kernel */
jmp_to_elf_entry(entry, bounce_buffer, bounce_size);
return 1;
out:
return 0;
}
int elfboot(struct lb_memory *mem)
{
Elf_ehdr *ehdr;
static unsigned char header[ELF_HEAD_SIZE];
int header_offset;
int i, result;
result = 0;
printk_debug("\nelfboot: Attempting to load payload.\n");
post_code(0xf8);
if (stream_init() < 0) {
printk_err("Could not initialize driver...\n");
goto out;
}
/* Read in the initial ELF_HEAD_SIZE bytes */
if (stream_read(header, ELF_HEAD_SIZE) != ELF_HEAD_SIZE) {
printk_err("Read failed...\n");
goto out;
}
/* Scan for an elf header */
header_offset = -1;
for(i = 0; i < ELF_HEAD_SIZE - (sizeof(Elf_ehdr) + sizeof(Elf_phdr)); i+=16) {
ehdr = (Elf_ehdr *)(&header[i]);
if (memcmp(ehdr->e_ident, ELFMAG, 4) != 0) {
printk_debug("No header at %d\n", i);
continue;
}
printk_debug("Found ELF candidate at offset %d\n", i);
/* Sanity check the elf header */
if ((ehdr->e_type == ET_EXEC) &&
elf_check_arch(ehdr) &&
(ehdr->e_ident[EI_VERSION] == EV_CURRENT) &&
(ehdr->e_version == EV_CURRENT) &&
(ehdr->e_ehsize == sizeof(Elf_ehdr)) &&
(ehdr->e_phentsize = sizeof(Elf_phdr)) &&
(ehdr->e_phoff < (ELF_HEAD_SIZE - i)) &&
((ehdr->e_phoff + (ehdr->e_phentsize * ehdr->e_phnum)) <=
(ELF_HEAD_SIZE - i))) {
header_offset = i;
break;
}
ehdr = 0;
}
printk_debug("header_offset is %d\n", header_offset);
if (header_offset == -1) {
goto out;
}
printk_debug("Try to load at offset 0x%x\n", header_offset);
result = elfload(mem,
header + header_offset , ELF_HEAD_SIZE - header_offset);
out:
if (!result) {
/* Shutdown the stream device */
stream_fini();
printk_err("Can not load ELF Image.\n");
post_code(0xff);
}
return 0;
}

194
src/boot/filo.c
View File

@ -1,194 +0,0 @@
/*
* Copyright (C) 2003 by SONE Takeshi <ts1@tsn.or.jp> and others.
* This program is licensed under the terms of GNU General Public License.
*
* Modified for coreboot by Greg Watson <gwatson@lanl.gov>
*/
#include <console/console.h>
#include <delay.h>
#include <string.h>
#include <boot/tables.h>
#include <boot/elf.h>
#define ENTER '\r'
#define ESCAPE '\x1b'
#ifndef CONFIG_AUTOBOOT_CMDLINE
#define autoboot(mem)
#endif
#if !CONFIG_AUTOBOOT_DELAY
#define autoboot_delay() 0 /* success */
#endif
#define havechar() console_tst_byte()
#define putchar(c) console_tx_byte(c)
#define getchar(c) console_rx_byte(c)
extern char *boot_file;
int getline(char *buf, int max)
{
int cur, ch, nonspace_seen;
cur = 0;
while (buf[cur]) {
putchar(buf[cur]);
cur++;
}
for (;;) {
ch = getchar();
switch (ch) {
/* end of line */
case '\r':
case '\n':
putchar('\n');
goto out;
/* backspace */
case '\b':
case '\x7f':
if (cur > 0) {
cur--;
putchar('\b');
putchar(' ');
putchar('\b');
}
break;
/* word erase */
case 'W' & 0x1f: /* ^W */
nonspace_seen = 0;
while (cur) {
if (buf[cur-1] != ' ')
nonspace_seen = 1;
putchar('\b');
putchar(' ');
putchar('\b');
cur--;
if (nonspace_seen && cur < max-1 && cur > 0 && buf[cur-1]==' ')
break;
}
break;
/* line erase */
case 'U' & 0x1f: /* ^U */
while (cur) {
putchar('\b');
putchar(' ');
putchar('\b');
cur--;
}
cur = 0;
break;
default:
if (ch < 0x20)
break; /* ignore control char */
if (ch >= 0x7f)
break;
if (cur + 1 < max) {
putchar(ch); /* echo back */
buf[cur] = ch;
cur++;
}
}
}
out:
if (cur >= max)
cur = max - 1;
buf[cur] = '\0';
return cur;
}
static void boot(struct lb_memory *mem, const char *line)
{
char *param;
/* Split filename and parameter */
boot_file = strdup(line);
param = strchr(boot_file, ' ');
if (param) {
*param = '\0';
param++;
}
if (!elfboot(mem))
printk_info("Unsupported image format\n");
free(boot_file);
}
#ifdef CONFIG_AUTOBOOT_CMDLINE
#if CONFIG_AUTOBOOT_DELAY
static inline int autoboot_delay(void)
{
unsigned int timeout;
int sec, tmp;
char key;
key = 0;
printk_info("Press <Enter> for default boot, or <Esc> for boot prompt... ");
for (sec = CONFIG_AUTOBOOT_DELAY; sec>0 && key==0; sec--) {
printk_info("%d", sec);
timeout = 10;
while (timeout-- > 0) {
if (havechar()) {
key = getchar();
if (key==ENTER || key==ESCAPE)
break;
}
mdelay(100);
}
for (tmp = sec; tmp; tmp /= 10)
printk_info("\b \b");
}
if (key == 0) {
printk_info("timed out\n");
return 0; /* success */
} else {
putchar('\n');
if (key == ESCAPE)
return -1; /* canceled */
else
return 0; /* default accepted */
}
}
#endif /* CONFIG_AUTOBOOT_DELAY */
static void autoboot(struct lb_memory *mem)
{
/* If Escape key is pressed already, skip autoboot */
if (havechar() && getchar()==ESCAPE)
return;
if (autoboot_delay()==0) {
printk_info("boot: %s\n", CONFIG_AUTOBOOT_CMDLINE);
boot(mem, CONFIG_AUTOBOOT_CMDLINE);
}
}
#endif /* CONFIG_AUTOBOOT_CMDLINE */
/* The main routine */
int filo(struct lb_memory *mem)
{
char line[256];
printk_info("FILO version 0.4.1\n");
/* Try default image */
autoboot(mem);
/* The above didn't work, ask user */
while (havechar())
getchar();
#ifdef CONFIG_AUTOBOOT_CMDLINE
strncpy(line, CONFIG_AUTOBOOT_CMDLINE, sizeof(line)-1);
line[sizeof(line)-1] = '\0';
#else
line[0] = '\0';
#endif
for (;;) {
printk_info("boot: ");
getline(line, sizeof line);
if (line[0])
boot(mem, line);
}
}

15
src/boot/hardwaremain.c
View File

@ -96,21 +96,10 @@ void hardwaremain(int boot_complete)
* write our configuration tables.
*/
lb_mem = write_tables();
#if CONFIG_CBFS == 1
# if CONFIG_USE_FALLBACK_IMAGE == 1
#if CONFIG_USE_FALLBACK_IMAGE == 1
cbfs_load_payload(lb_mem, "fallback/payload");
# else
#else
cbfs_load_payload(lb_mem, "normal/payload");
# endif
#else
#if CONFIG_FS_PAYLOAD == 1
#warning "CONFIG_FS_PAYLOAD is deprecated."
filo(lb_mem);
#else
#warning "elfboot will soon be deprecated."
elfboot(lb_mem);
#endif
#endif
printk(BIOS_ERR, "Boot failed.\n");
}

1
src/config/Config.lb
View File

@ -215,7 +215,6 @@ end
# for now, this is just 'lib', but it may be more later.
dir /lib
dir /console
dir /stream
dir /devices
dir /pc80
dir /boot

46
src/config/Options.lb
View File

@ -641,11 +641,6 @@ define CONFIG_MULTIBOOT
export always
comment "Use Multiboot (rather than ELF boot notes) to boot the payload"
end
define CONFIG_IDE_PAYLOAD
default 0
export always
comment "Boot from IDE device"
end
define CONFIG_ROM_PAYLOAD
default 0
export always
@ -672,47 +667,6 @@ define CONFIG_PRECOMPRESSED_PAYLOAD
export always
comment "boot image is already compressed"
end
define CONFIG_SERIAL_PAYLOAD
default 0
export always
comment "Download boot image from serial port"
end
define CONFIG_FS_PAYLOAD
default 0
export always
comment "Boot from a filesystem"
end
define CONFIG_FS_EXT2
default 0
export always
comment "Enable ext2 filesystem support"
end
define CONFIG_FS_ISO9660
default 0
export always
comment "Enable ISO9660 filesystem support"
end
define CONFIG_FS_FAT
default 0
export always
comment "Enable FAT filesystem support"
end
define CONFIG_CBFS
default 1
export always
comment "The new CBFS file system"
end
define CONFIG_AUTOBOOT_DELAY
default 2
export always
comment "Delay (in seconds) before autobooting"
end
define CONFIG_AUTOBOOT_CMDLINE
default "hdc1:/vmlinuz root=/dev/hdc3 console=tty0 console=ttyS0,115200"
export always
format "\"%s\""
comment "Default command line when autobooting"
end
define CONFIG_USE_WATCHDOG_ON_BOOT
default 0

9
src/config/failovercalculation.lb
View File

@ -10,13 +10,8 @@ else
default CONFIG_ROM_SECTION_SIZE = CONFIG_FALLBACK_SIZE
default CONFIG_ROM_SECTION_OFFSET = ( CONFIG_ROM_SIZE - CONFIG_FALLBACK_SIZE - CONFIG_FAILOVER_SIZE )
else
if CONFIG_CBFS
default CONFIG_ROM_SECTION_SIZE = CONFIG_FALLBACK_SIZE
default CONFIG_ROM_SECTION_OFFSET = ( CONFIG_ROM_SIZE - CONFIG_FALLBACK_SIZE - CONFIG_FALLBACK_SIZE - CONFIG_FAILOVER_SIZE )
else
default CONFIG_ROM_SECTION_SIZE = ( CONFIG_ROM_SIZE - CONFIG_FALLBACK_SIZE - CONFIG_FAILOVER_SIZE )
default CONFIG_ROM_SECTION_OFFSET = 0
end
default CONFIG_ROM_SECTION_SIZE = CONFIG_FALLBACK_SIZE
default CONFIG_ROM_SECTION_OFFSET = ( CONFIG_ROM_SIZE - CONFIG_FALLBACK_SIZE - CONFIG_FALLBACK_SIZE - CONFIG_FAILOVER_SIZE )
end
end

9
src/config/nofailovercalculation.lb
View File

@ -6,13 +6,8 @@ if CONFIG_USE_FALLBACK_IMAGE
default CONFIG_ROM_SECTION_SIZE = CONFIG_FALLBACK_SIZE
default CONFIG_ROM_SECTION_OFFSET = ( CONFIG_ROM_SIZE - CONFIG_FALLBACK_SIZE )
else
if CONFIG_CBFS
default CONFIG_ROM_SECTION_SIZE = CONFIG_FALLBACK_SIZE
default CONFIG_ROM_SECTION_OFFSET = ( CONFIG_ROM_SIZE - CONFIG_FALLBACK_SIZE - CONFIG_FALLBACK_SIZE )
else
default CONFIG_ROM_SECTION_SIZE = ( CONFIG_ROM_SIZE - CONFIG_FALLBACK_SIZE )
default CONFIG_ROM_SECTION_OFFSET = 0
end
default CONFIG_ROM_SECTION_SIZE = CONFIG_FALLBACK_SIZE
default CONFIG_ROM_SECTION_OFFSET = ( CONFIG_ROM_SIZE - CONFIG_FALLBACK_SIZE - CONFIG_FALLBACK_SIZE )
end
##

42
src/cpu/amd/car/copy_and_run.c
View File

@ -3,16 +3,15 @@
2006/05/02 - stepan: move nrv2b to an extra file.
*/
#if CONFIG_CBFS == 1
void cbfs_and_run_core(const char*, unsigned ebp);
static void copy_and_run(void)
{
# if CONFIG_USE_FALLBACK_IMAGE == 1
#if CONFIG_USE_FALLBACK_IMAGE == 1
cbfs_and_run_core("fallback/coreboot_ram", 0);
# else
#else
cbfs_and_run_core("normal/coreboot_ram", 0);
# endif
#endif
}
#if CONFIG_AP_CODE_IN_CAR == 1
@ -26,38 +25,3 @@ static void copy_and_run_ap_code_in_car(unsigned ret_addr)
# endif
}
#endif
#else
void copy_and_run_core(u8 *src, u8 *dst, unsigned long ilen, unsigned ebp);
extern u8 _liseg, _iseg, _eiseg;
static void copy_and_run(void)
{
uint8_t *src, *dst;
unsigned long ilen;
src = &_liseg;
dst = &_iseg;
ilen = &_eiseg - dst;
copy_and_run_core(src, dst, ilen, 0);
}
#if CONFIG_AP_CODE_IN_CAR == 1
extern u8 _liseg_apc, _iseg_apc, _eiseg_apc;
static void copy_and_run_ap_code_in_car(unsigned ret_addr)
{
uint8_t *src, *dst;
unsigned long ilen;
src = &_liseg_apc;
dst = &_iseg_apc;
ilen = &_eiseg_apc - dst;
copy_and_run_core(src, dst, ilen, ret_addr);
}
#endif
#endif

17
src/cpu/amd/model_lx/cache_as_ram.inc
View File

@ -222,19 +222,8 @@ __main:
movl $0x4000000, %esp
movl %esp, %ebp
pushl %esi
#if CONFIG_CBFS == 1
pushl $str_coreboot_ram_name
call cbfs_and_run_core
#else
movl $_liseg, %esi
movl $_iseg, %edi
movl $_eiseg, %ecx
subl %edi, %ecx
pushl %ecx
pushl %edi
pushl %esi
call copy_and_run_core
#endif
.Lhlt:
intel_chip_post_macro(0xee) /* post fail ee */
@ -295,10 +284,8 @@ str_pre_main: .string "Jumping to coreboot.\r\n"
.previous
#endif /* ASM_CONSOLE_LOGLEVEL > BIOS_DEBUG */
#if CONFIG_CBFS == 1
# if CONFIG_USE_FALLBACK_IMAGE == 1
#if CONFIG_USE_FALLBACK_IMAGE == 1
str_coreboot_ram_name: .string "fallback/coreboot_ram"
# else
#else
str_coreboot_ram_name: .string "normal/coreboot_ram"
# endif
#endif

30
src/cpu/x86/car/copy_and_run.c
View File

@ -2,7 +2,6 @@
(Written by Patrick Georgi <patrick.georgi@coresystems.de> for coresystems GmbH
*/
#if CONFIG_CBFS == 1
void cbfs_and_run_core(char*, unsigned ebp);
static void copy_and_run(unsigned cpu_reset)
@ -10,32 +9,9 @@ static void copy_and_run(unsigned cpu_reset)
if (cpu_reset == 1) cpu_reset = -1;
else cpu_reset = 0;
# if CONFIG_USE_FALLBACK_IMAGE == 1
#if CONFIG_USE_FALLBACK_IMAGE == 1
cbfs_and_run_core("fallback/coreboot_ram", cpu_reset);
# else
cbfs_and_run_core("normal/coreboot_ram", cpu_reset);
# endif
}
#else
void copy_and_run_core(u8 *src, u8 *dst, unsigned long ilen, unsigned ebp);
extern u8 _liseg, _iseg, _eiseg;
static void copy_and_run(unsigned cpu_reset)
{
uint8_t *src, *dst;
unsigned long ilen;
src = &_liseg;
dst = &_iseg;
ilen = &_eiseg - dst;
if (cpu_reset == 1) cpu_reset = -1;
else cpu_reset = 0;
copy_and_run_core(src, dst, ilen, cpu_reset);
}
cbfs_and_run_core("normal/coreboot_ram", cpu_reset);
#endif
}

23
src/devices/pci_rom.c
View File

@ -35,22 +35,17 @@ struct rom_header * pci_rom_probe(struct device *dev)
struct rom_header *rom_header;
struct pci_data *rom_data;
if (CONFIG_CBFS) {
void *v;
/* if it's in FLASH, then it's as if dev->on_mainboard was true */
v = cbfs_load_optionrom(dev->vendor, dev->device, NULL);
printk_debug("In cbfs, rom address for %s = %p\n",
dev_path(dev), v);
if (v) {
dev->rom_address = (u32)v;
dev->on_mainboard = 1;
}
}
void *v;
/* if it's in FLASH, then it's as if dev->on_mainboard was true */
v = cbfs_load_optionrom(dev->vendor, dev->device, NULL);
printk_debug("In cbfs, rom address for %s = %p\n",
dev_path(dev), v);
if (v) {
dev->rom_address = (u32)v;
dev->on_mainboard = 1;
}
if (dev->on_mainboard) {
/* this is here as a legacy path. We hope it goes away soon. Users should not have to
* compute the ROM address at build time!
*/
// in case some device PCI_ROM_ADDRESS can not be set or readonly
rom_address = dev->rom_address;
printk_debug("On mainboard, rom address for %s = %lx\n",

10
src/lib/Config.lb
View File

@ -27,11 +27,5 @@ initobject memset.o
initobject memcpy.o
initobject memcmp.o
if CONFIG_CBFS
object cbfs.o
object lzma.o
end
if CONFIG_COMPRESSED_PAYLOAD_LZMA
object lzma.o
end
object cbfs.o
object lzma.o

6
src/mainboard/a-trend/atc-6220/Options.lb
View File

@ -19,7 +19,6 @@
##
uses CONFIG_HAVE_MP_TABLE
uses CONFIG_CBFS
uses CONFIG_HAVE_PIRQ_TABLE
uses CONFIG_USE_FALLBACK_IMAGE
uses CONFIG_HAVE_FALLBACK_BOOT
@ -97,9 +96,4 @@ default CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 9
default CONFIG_CONSOLE_VGA = 1
default CONFIG_PCI_ROM_RUN = 1
#
# CBFS
#
#
default CONFIG_CBFS=1
end

6
src/mainboard/a-trend/atc-6240/Options.lb
View File

@ -19,7 +19,6 @@
##
uses CONFIG_HAVE_MP_TABLE
uses CONFIG_CBFS
uses CONFIG_HAVE_PIRQ_TABLE
uses CONFIG_USE_FALLBACK_IMAGE
uses CONFIG_HAVE_FALLBACK_BOOT
@ -97,9 +96,4 @@ default CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 9
default CONFIG_CONSOLE_VGA = 1
default CONFIG_PCI_ROM_RUN = 1
#
# CBFS
#
#
default CONFIG_CBFS=1
end

6
src/mainboard/abit/be6-ii_v2_0/Options.lb
View File

@ -19,7 +19,6 @@
##
uses CONFIG_HAVE_MP_TABLE
uses CONFIG_CBFS
uses CONFIG_HAVE_PIRQ_TABLE
uses CONFIG_USE_FALLBACK_IMAGE
uses CONFIG_HAVE_FALLBACK_BOOT
@ -98,9 +97,4 @@ default CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 9 # Override this in targets/*/Config.
default CONFIG_CONSOLE_VGA = 1 # Override this in targets/*/Config.lb.
default CONFIG_PCI_ROM_RUN = 1 # Override this in targets/*/Config.lb.
#
# CBFS
#
#
default CONFIG_CBFS=1
end

6
src/mainboard/advantech/pcm-5820/Options.lb
View File

@ -19,7 +19,6 @@
##
uses CONFIG_HAVE_MP_TABLE
uses CONFIG_CBFS
uses CONFIG_HAVE_PIRQ_TABLE
uses CONFIG_USE_FALLBACK_IMAGE
uses CONFIG_HAVE_FALLBACK_BOOT
@ -103,9 +102,4 @@ default CONFIG_TTYS0_LCS = 0x3 # 8n1
default CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 9
default CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 9
#
# CBFS
#
#
default CONFIG_CBFS=1
end

7
src/mainboard/amd/db800/Options.lb
View File

@ -1,5 +1,4 @@
uses CONFIG_HAVE_MP_TABLE
uses CONFIG_CBFS
uses CONFIG_HAVE_PIRQ_TABLE
uses CONFIG_USE_FALLBACK_IMAGE
uses CONFIG_HAVE_FALLBACK_BOOT
@ -180,10 +179,4 @@ default CONFIG_DEFAULT_CONSOLE_LOGLEVEL=8
## At a maximum only compile in this level of debugging
default CONFIG_MAXIMUM_CONSOLE_LOGLEVEL=8
#
# CBFS
#
#
default CONFIG_CBFS=1
end

6
src/mainboard/amd/dbm690t/Options.lb
View File

@ -20,7 +20,6 @@
##
uses CONFIG_HAVE_MP_TABLE
uses CONFIG_CBFS
uses CONFIG_HAVE_PIRQ_TABLE
uses CONFIG_HAVE_ACPI_TABLES
uses CONFIG_HAVE_ACPI_RESUME
@ -301,9 +300,4 @@ default CONFIG_GFXUMA=1
default CONFIG_HAVE_MAINBOARD_RESOURCES=1
### End Options.lb
#
# CBFS
#
#
default CONFIG_CBFS=1
end

7
src/mainboard/amd/norwich/Options.lb
View File

@ -1,5 +1,4 @@
uses CONFIG_HAVE_MP_TABLE
uses CONFIG_CBFS
uses CONFIG_HAVE_PIRQ_TABLE
uses CONFIG_USE_FALLBACK_IMAGE
uses CONFIG_HAVE_FALLBACK_BOOT
@ -180,10 +179,4 @@ default CONFIG_DEFAULT_CONSOLE_LOGLEVEL=8
## At a maximum only compile in this level of debugging
default CONFIG_MAXIMUM_CONSOLE_LOGLEVEL=8
#
# CBFS
#
#
default CONFIG_CBFS=1
end

6
src/mainboard/amd/pistachio/Options.lb
View File

@ -20,7 +20,6 @@
##
uses CONFIG_HAVE_MP_TABLE
uses CONFIG_CBFS
uses CONFIG_HAVE_PIRQ_TABLE
uses CONFIG_HAVE_ACPI_TABLES
uses CONFIG_HAVE_ACPI_RESUME
@ -299,9 +298,4 @@ default CONFIG_GFXUMA=1
default CONFIG_HAVE_MAINBOARD_RESOURCES=1
### End Options.lb
#
# CBFS
#
#
default CONFIG_CBFS=1
end

7
src/mainboard/amd/rumba/Options.lb
View File

@ -1,5 +1,4 @@
uses CONFIG_HAVE_MP_TABLE
uses CONFIG_CBFS
uses CONFIG_HAVE_PIRQ_TABLE
uses CONFIG_USE_FALLBACK_IMAGE
uses CONFIG_HAVE_FALLBACK_BOOT
@ -159,10 +158,4 @@ default CONFIG_DEFAULT_CONSOLE_LOGLEVEL=8
## At a maximum only compile in this level of debugging
default CONFIG_MAXIMUM_CONSOLE_LOGLEVEL=8
#
# CBFS
#
#
default CONFIG_CBFS=1
end

6
src/mainboard/amd/serengeti_cheetah/Options.lb
View File

@ -1,5 +1,4 @@
uses CONFIG_HAVE_MP_TABLE
uses CONFIG_CBFS
uses CONFIG_HAVE_PIRQ_TABLE
uses CONFIG_HAVE_ACPI_TABLES
uses CONFIG_HAVE_ACPI_RESUME
@ -325,9 +324,4 @@ default CONFIG_MAXIMUM_CONSOLE_LOGLEVEL=8
default CONFIG_MAINBOARD_POWER_ON_AFTER_POWER_FAIL="MAINBOARD_POWER_ON"
### End Options.lb
#
# CBFS
#
#
default CONFIG_CBFS=1
end

6
src/mainboard/amd/serengeti_cheetah_fam10/Options.lb
View File

@ -18,7 +18,6 @@
#
uses CONFIG_HAVE_MP_TABLE
uses CONFIG_CBFS
uses CONFIG_HAVE_PIRQ_TABLE
uses CONFIG_HAVE_ACPI_TABLES
uses CONFIG_HAVE_ACPI_RESUME
@ -362,9 +361,4 @@ default CONFIG_MAXIMUM_CONSOLE_LOGLEVEL=8
default CONFIG_MAINBOARD_POWER_ON_AFTER_POWER_FAIL="MAINBOARD_POWER_ON"
### End Options.lb
#
# CBFS
#
#
default CONFIG_CBFS=1
end

6
src/mainboard/arima/hdama/Options.lb
View File

@ -1,5 +1,4 @@
uses CONFIG_HAVE_MP_TABLE
uses CONFIG_CBFS
uses CONFIG_HAVE_PIRQ_TABLE
uses CONFIG_USE_FALLBACK_IMAGE
uses CONFIG_HAVE_FALLBACK_BOOT
@ -242,9 +241,4 @@ default CONFIG_MAXIMUM_CONSOLE_LOGLEVEL=8
default CONFIG_MAINBOARD_POWER_ON_AFTER_POWER_FAIL="MAINBOARD_POWER_ON"
### End Options.lb
#
# CBFS
#
#
default CONFIG_CBFS=1
end

7
src/mainboard/artecgroup/dbe61/Options.lb
View File

@ -1,5 +1,4 @@
uses CONFIG_HAVE_MP_TABLE
uses CONFIG_CBFS
uses CONFIG_HAVE_PIRQ_TABLE
uses CONFIG_USE_FALLBACK_IMAGE
uses CONFIG_HAVE_FALLBACK_BOOT
@ -180,10 +179,4 @@ default CONFIG_DEFAULT_CONSOLE_LOGLEVEL=8
## At a maximum only compile in this level of debugging
default CONFIG_MAXIMUM_CONSOLE_LOGLEVEL=8
#
# CBFS
#
#
default CONFIG_CBFS=1
end

6
src/mainboard/asi/mb_5blgp/Options.lb
View File

@ -19,7 +19,6 @@
##
uses CONFIG_HAVE_MP_TABLE
uses CONFIG_CBFS
uses CONFIG_HAVE_PIRQ_TABLE
uses CONFIG_USE_FALLBACK_IMAGE
uses CONFIG_HAVE_FALLBACK_BOOT
@ -103,9 +102,4 @@ default CONFIG_TTYS0_LCS = 0x3 # 8n1
default CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 9
default CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 9
#
# CBFS
#
#
default CONFIG_CBFS=1
end

7
src/mainboard/asi/mb_5blmp/Options.lb
View File

@ -1,5 +1,4 @@
uses CONFIG_HAVE_PIRQ_TABLE
uses CONFIG_CBFS
uses CONFIG_USE_FALLBACK_IMAGE
uses CONFIG_HAVE_FALLBACK_BOOT
uses CONFIG_HAVE_HARD_RESET
@ -161,10 +160,4 @@ default CONFIG_MAXIMUM_CONSOLE_LOGLEVEL=9
# default CONFIG_PCI_ROM_RUN=1
default CONFIG_VIDEO_MB = 0
#
# CBFS
#
#
default CONFIG_CBFS=1
end

6
src/mainboard/asus/a8n_e/Options.lb
View File

@ -20,7 +20,6 @@
##
uses CONFIG_HAVE_MP_TABLE
uses CONFIG_CBFS
uses CONFIG_HAVE_PIRQ_TABLE
uses CONFIG_USE_FALLBACK_IMAGE
uses CONFIG_USE_FAILOVER_IMAGE
@ -167,9 +166,4 @@ default CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 8
default CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 8
default CONFIG_MAINBOARD_POWER_ON_AFTER_POWER_FAIL = "MAINBOARD_POWER_ON"
#
# CBFS
#
#
default CONFIG_CBFS=1
end

6
src/mainboard/asus/a8v-e_se/Options.lb
View File

@ -18,7 +18,6 @@
##
uses CONFIG_HAVE_MP_TABLE
uses CONFIG_CBFS
uses CONFIG_HAVE_PIRQ_TABLE
uses CONFIG_USE_FALLBACK_IMAGE
uses CONFIG_HAVE_FALLBACK_BOOT
@ -167,9 +166,4 @@ default CONFIG_TTYS0_LCS = 0x3 # 8n1
default CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 8
default CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 8
default CONFIG_MAINBOARD_POWER_ON_AFTER_POWER_FAIL = "MAINBOARD_POWER_ON"
#
# CBFS
#
#
default CONFIG_CBFS=1
end

6
src/mainboard/asus/m2v-mx_se/Options.lb
View File

@ -18,7 +18,6 @@
##
uses CONFIG_HAVE_MP_TABLE
uses CONFIG_CBFS
uses CONFIG_HAVE_PIRQ_TABLE
uses CONFIG_USE_FALLBACK_IMAGE
uses CONFIG_HAVE_FALLBACK_BOOT
@ -176,9 +175,4 @@ default CONFIG_MAINBOARD_POWER_ON_AFTER_POWER_FAIL = "MAINBOARD_POWER_ON"
default CONFIG_FALLBACK_SIZE = CONFIG_ROM_IMAGE_SIZE
default CONFIG_ROM_IMAGE_SIZE = 64 * 1024
#
# CBFS
#
#
default CONFIG_CBFS=1
end

6
src/mainboard/asus/mew-am/Options.lb
View File

@ -19,7 +19,6 @@
##
uses CONFIG_HAVE_MP_TABLE
uses CONFIG_CBFS
uses CONFIG_HAVE_PIRQ_TABLE
uses CONFIG_USE_FALLBACK_IMAGE
uses CONFIG_HAVE_FALLBACK_BOOT
@ -97,9 +96,4 @@ default CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 9 # Override this in targets/*/Config.
default CONFIG_CONSOLE_VGA = 1 # Override this in targets/*/Config.lb.
default CONFIG_PCI_ROM_RUN = 1 # Override this in targets/*/Config.lb.
#
# CBFS
#
#
default CONFIG_CBFS=1
end

6
src/mainboard/asus/mew-vm/Options.lb
View File

@ -1,5 +1,4 @@
uses CONFIG_HAVE_MP_TABLE
uses CONFIG_CBFS
uses CONFIG_HAVE_PIRQ_TABLE
uses CONFIG_USE_FALLBACK_IMAGE
uses CONFIG_HAVE_FALLBACK_BOOT
@ -158,9 +157,4 @@ default CONFIG_MAXIMUM_CONSOLE_LOGLEVEL=9
default CONFIG_UDELAY_TSC=1
#
# CBFS
#
#
default CONFIG_CBFS=1
end

2
src/mainboard/asus/p2b-d/Options.lb
View File

@ -19,7 +19,6 @@
##
uses CONFIG_HAVE_MP_TABLE
uses CONFIG_CBFS
uses CONFIG_HAVE_PIRQ_TABLE
uses CONFIG_USE_FALLBACK_IMAGE
uses CONFIG_HAVE_FALLBACK_BOOT
@ -103,5 +102,4 @@ default CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 9
default CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 9
default CONFIG_CONSOLE_VGA = 1
default CONFIG_PCI_ROM_RUN = 1
default CONFIG_CBFS=1
end

6
src/mainboard/asus/p2b-ds/Options.lb
View File

@ -19,7 +19,6 @@
##
uses CONFIG_HAVE_MP_TABLE
uses CONFIG_CBFS
uses CONFIG_HAVE_PIRQ_TABLE
uses CONFIG_USE_FALLBACK_IMAGE
uses CONFIG_HAVE_FALLBACK_BOOT
@ -104,9 +103,4 @@ default CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 9
default CONFIG_CONSOLE_VGA = 1
default CONFIG_PCI_ROM_RUN = 1
#
# CBFS
#
#
default CONFIG_CBFS=1
end

6
src/mainboard/asus/p2b-f/Options.lb
View File

@ -19,7 +19,6 @@
##
uses CONFIG_HAVE_MP_TABLE
uses CONFIG_CBFS
uses CONFIG_HAVE_PIRQ_TABLE
uses CONFIG_USE_FALLBACK_IMAGE
uses CONFIG_HAVE_FALLBACK_BOOT
@ -97,9 +96,4 @@ default CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 9
default CONFIG_CONSOLE_VGA = 1
default CONFIG_PCI_ROM_RUN = 1
#
# CBFS
#
#
default CONFIG_CBFS=1
end

6
src/mainboard/asus/p2b/Options.lb
View File

@ -19,7 +19,6 @@
##
uses CONFIG_HAVE_MP_TABLE
uses CONFIG_CBFS
uses CONFIG_HAVE_PIRQ_TABLE
uses CONFIG_USE_FALLBACK_IMAGE
uses CONFIG_HAVE_FALLBACK_BOOT
@ -98,9 +97,4 @@ default CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 9
default CONFIG_CONSOLE_VGA = 1
default CONFIG_PCI_ROM_RUN = 1
#
# CBFS
#
#
default CONFIG_CBFS=1
end

6
src/mainboard/asus/p3b-f/Options.lb
View File

@ -19,7 +19,6 @@
##
uses CONFIG_HAVE_MP_TABLE
uses CONFIG_CBFS
uses CONFIG_HAVE_PIRQ_TABLE
uses CONFIG_USE_FALLBACK_IMAGE
uses CONFIG_HAVE_FALLBACK_BOOT
@ -97,9 +96,4 @@ default CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 9
default CONFIG_CONSOLE_VGA = 1
default CONFIG_PCI_ROM_RUN = 1
#
# CBFS
#
#
default CONFIG_CBFS=1
end

6
src/mainboard/axus/tc320/Options.lb
View File

@ -19,7 +19,6 @@
##
uses CONFIG_HAVE_MP_TABLE
uses CONFIG_CBFS
uses CONFIG_HAVE_PIRQ_TABLE
uses CONFIG_USE_FALLBACK_IMAGE
uses CONFIG_HAVE_FALLBACK_BOOT
@ -103,9 +102,4 @@ default CONFIG_TTYS0_LCS = 0x3 # 8n1
default CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 6
default CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 6
#
# CBFS
#
#
default CONFIG_CBFS=1
end

6
src/mainboard/azza/pt-6ibd/Options.lb
View File

@ -19,7 +19,6 @@
##
uses CONFIG_HAVE_MP_TABLE
uses CONFIG_CBFS
uses CONFIG_HAVE_PIRQ_TABLE
uses CONFIG_USE_FALLBACK_IMAGE
uses CONFIG_HAVE_FALLBACK_BOOT
@ -97,9 +96,4 @@ default CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 9
default CONFIG_CONSOLE_VGA = 1
default CONFIG_PCI_ROM_RUN = 1
#
# CBFS
#
#
default CONFIG_CBFS=1
end

6
src/mainboard/bcom/winnet100/Options.lb
View File

@ -19,7 +19,6 @@
##
uses CONFIG_HAVE_MP_TABLE
uses CONFIG_CBFS
uses CONFIG_HAVE_PIRQ_TABLE
uses CONFIG_USE_FALLBACK_IMAGE
uses CONFIG_HAVE_FALLBACK_BOOT
@ -103,9 +102,4 @@ default CONFIG_TTYS0_LCS = 0x3 # 8n1
default CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 6
default CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 6
#
# CBFS
#
#
default CONFIG_CBFS=1
end

7
src/mainboard/bcom/winnetp680/Options.lb
View File

@ -20,7 +20,6 @@
##
uses CONFIG_HAVE_MP_TABLE
uses CONFIG_CBFS
uses CONFIG_HAVE_PIRQ_TABLE
uses CONFIG_USE_FALLBACK_IMAGE
uses CONFIG_HAVE_FALLBACK_BOOT
@ -103,10 +102,4 @@ default HOSTCC = "gcc"
##
default CONFIG_MAX_PCI_BUSES = 3
#
# CBFS
#
#
default CONFIG_CBFS=1
end

6
src/mainboard/biostar/m6tba/Options.lb
View File

@ -19,7 +19,6 @@
##
uses CONFIG_HAVE_MP_TABLE
uses CONFIG_CBFS
uses CONFIG_HAVE_PIRQ_TABLE
uses CONFIG_USE_FALLBACK_IMAGE
uses CONFIG_HAVE_FALLBACK_BOOT
@ -97,9 +96,4 @@ default CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 9
default CONFIG_CONSOLE_VGA = 1
default CONFIG_PCI_ROM_RUN = 1
#
# CBFS
#
#
default CONFIG_CBFS=1
end

6
src/mainboard/broadcom/blast/Options.lb
View File

@ -1,5 +1,4 @@
uses CONFIG_HAVE_MP_TABLE
uses CONFIG_CBFS
uses CONFIG_HAVE_PIRQ_TABLE
uses CONFIG_HAVE_ACPI_TABLES
uses CONFIG_HAVE_ACPI_RESUME
@ -260,9 +259,4 @@ default CONFIG_MAXIMUM_CONSOLE_LOGLEVEL=8
default CONFIG_MAINBOARD_POWER_ON_AFTER_POWER_FAIL="MAINBOARD_POWER_ON"
### End Options.lb
#
# CBFS
#
#
default CONFIG_CBFS=1
end

6
src/mainboard/compaq/deskpro_en_sff_p600/Options.lb
View File

@ -19,7 +19,6 @@
##
uses CONFIG_HAVE_MP_TABLE
uses CONFIG_CBFS
uses CONFIG_HAVE_PIRQ_TABLE
uses CONFIG_USE_FALLBACK_IMAGE
uses CONFIG_HAVE_FALLBACK_BOOT
@ -97,9 +96,4 @@ default CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 9
default CONFIG_CONSOLE_VGA = 1
default CONFIG_PCI_ROM_RUN = 1
#
# CBFS
#
#
default CONFIG_CBFS=1
end

6
src/mainboard/dell/s1850/Options.lb
View File

@ -1,5 +1,4 @@
uses CONFIG_HAVE_MP_TABLE
uses CONFIG_CBFS
uses CONFIG_HAVE_PIRQ_TABLE
uses CONFIG_USE_FALLBACK_IMAGE
uses CONFIG_HAVE_FALLBACK_BOOT
@ -228,9 +227,4 @@ default CONFIG_CONSOLE_BTEXT=0
### End Options.lb
#
# CBFS
#
#
default CONFIG_CBFS=1
end

8
src/mainboard/digitallogic/adl855pc/Options.lb
View File

@ -1,5 +1,4 @@
uses CONFIG_HAVE_MP_TABLE
uses CONFIG_CBFS
uses CONFIG_HAVE_PIRQ_TABLE
uses CONFIG_USE_FALLBACK_IMAGE
uses CONFIG_HAVE_FALLBACK_BOOT
@ -113,11 +112,4 @@ default CONFIG_ROM_PAYLOAD = 1
default CC="$(CONFIG_CROSS_COMPILE)gcc -m32"
default HOSTCC="gcc"
#
# CBFS
#
#
default CONFIG_CBFS=1
end

8
src/mainboard/digitallogic/msm586seg/Options.lb
View File

@ -1,5 +1,4 @@
uses CONFIG_HAVE_MP_TABLE
uses CONFIG_CBFS
uses CONFIG_HAVE_PIRQ_TABLE
uses CONFIG_USE_FALLBACK_IMAGE
uses CONFIG_HAVE_FALLBACK_BOOT
@ -121,11 +120,4 @@ default CONFIG_ROM_PAYLOAD = 1
default CC="$(CONFIG_CROSS_COMPILE)gcc -m32"
default HOSTCC="gcc"
#
# CBFS
#
#
default CONFIG_CBFS=1
end

12
src/mainboard/digitallogic/msm586seg/mainboard.c
View File

@ -35,9 +35,6 @@ static void irqdump()
- set ADDDECTL (now done in raminit.c in cpu/amd/sc520
*/
static void enable_dev(struct device *dev) {
#if !CONFIG_CBFS
extern unsigned char *rom_start, *rom_end;
#endif
volatile struct mmcrpic *pic = MMCRPIC;
volatile struct mmcr *mmcr = MMCRDEFAULT;
@ -135,15 +132,6 @@ static void enable_dev(struct device *dev) {
*/
/* follow fuctory here */
mmcr->dmacontrol.extchanmapa = 0x3210;
#if !CONFIG_CBFS
/* hack for IDIOTIC need to fix rom_start */
printk_err("Patching rom_start due to sc520 limits\n");
rom_start = 0x2000000 + 0x40000;
rom_end = rom_start + CONFIG_PAYLOAD_SIZE - 1;
#endif
}
struct chip_operations mainboard_ops = {
CHIP_NAME("DIGITAL-LOGIC MSM586SEG Mainboard")

7
src/mainboard/digitallogic/msm800sev/Options.lb
View File

@ -1,5 +1,4 @@
uses CONFIG_HAVE_MP_TABLE
uses CONFIG_CBFS
uses CONFIG_HAVE_PIRQ_TABLE
uses CONFIG_USE_FALLBACK_IMAGE
uses CONFIG_HAVE_FALLBACK_BOOT
@ -180,10 +179,4 @@ default CONFIG_DEFAULT_CONSOLE_LOGLEVEL=8
## At a maximum only compile in this level of debugging
default CONFIG_MAXIMUM_CONSOLE_LOGLEVEL=8
#
# CBFS
#
#
default CONFIG_CBFS=1
end

7
src/mainboard/eaglelion/5bcm/Options.lb
View File

@ -1,5 +1,4 @@
uses CONFIG_HAVE_MP_TABLE
uses CONFIG_CBFS
uses CONFIG_HAVE_PIRQ_TABLE
uses CONFIG_USE_FALLBACK_IMAGE
uses CONFIG_HAVE_FALLBACK_BOOT
@ -164,10 +163,4 @@ default CONFIG_MAXIMUM_CONSOLE_LOGLEVEL=8
default CONFIG_VIDEO_MB = 0
#
# CBFS
#
#
default CONFIG_CBFS=1
end

2
src/mainboard/emulation/qemu-x86/Options.lb
View File

@ -48,13 +48,11 @@ uses CONFIG_USE_PRINTK_IN_CAR
uses CONFIG_DEFAULT_CONSOLE_LOGLEVEL
uses CONFIG_MAXIMUM_CONSOLE_LOGLEVEL
uses CONFIG_CBFS
default CONFIG_CONSOLE_SERIAL8250=1
default CONFIG_DEFAULT_CONSOLE_LOGLEVEL=8
default CONFIG_MAXIMUM_CONSOLE_LOGLEVEL=8
default CONFIG_CBFS=1
## CONFIG_ROM_SIZE is the size of boot ROM that this board will use.
default CONFIG_ROM_SIZE = 256*1024

6
src/mainboard/gigabyte/ga-6bxc/Options.lb
View File

@ -19,7 +19,6 @@
##
uses CONFIG_HAVE_MP_TABLE
uses CONFIG_CBFS
uses CONFIG_HAVE_PIRQ_TABLE
uses CONFIG_USE_FALLBACK_IMAGE
uses CONFIG_HAVE_FALLBACK_BOOT
@ -97,9 +96,4 @@ default CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 9
default CONFIG_CONSOLE_VGA = 1
default CONFIG_PCI_ROM_RUN = 1
#
# CBFS
#
#
default CONFIG_CBFS=1
end

6
src/mainboard/gigabyte/ga_2761gxdk/Options.lb
View File

@ -22,7 +22,6 @@
##
uses CONFIG_HAVE_MP_TABLE
uses CONFIG_CBFS
uses CONFIG_HAVE_PIRQ_TABLE
uses CONFIG_HAVE_ACPI_TABLES
uses CONFIG_HAVE_ACPI_RESUME
@ -351,9 +350,4 @@ default CONFIG_MAXIMUM_CONSOLE_LOGLEVEL=8
default CONFIG_MAINBOARD_POWER_ON_AFTER_POWER_FAIL="MAINBOARD_POWER_ON"
### End Options.lb
#
# CBFS
#
#
default CONFIG_CBFS=1
end

6
src/mainboard/gigabyte/m57sli/Options.lb
View File

@ -20,7 +20,6 @@
##
uses CONFIG_HAVE_MP_TABLE
uses CONFIG_CBFS
uses CONFIG_HAVE_PIRQ_TABLE
uses CONFIG_HAVE_ACPI_TABLES
uses CONFIG_HAVE_ACPI_RESUME
@ -359,10 +358,5 @@ default CONFIG_MAXIMUM_CONSOLE_LOGLEVEL=8
## Select power on after power fail setting
default CONFIG_MAINBOARD_POWER_ON_AFTER_POWER_FAIL="MAINBOARD_POWER_ON"
#
# CBFS
#
#
default CONFIG_CBFS=1
### End Options.lb
end

5
src/mainboard/hp/dl145_g3/Options.lb
View File

@ -84,7 +84,6 @@ uses CONFIG_PCI_ROM_RUN
uses CONFIG_HW_MEM_HOLE_SIZEK
uses CONFIG_HW_MEM_HOLE_SIZE_AUTO_INC
uses CONFIG_K8_HT_FREQ_1G_SUPPORT
uses CONFIG_CBFS
uses CONFIG_HT_CHAIN_UNITID_BASE
uses CONFIG_HT_CHAIN_END_UNITID_BASE
@ -327,9 +326,5 @@ default CONFIG_MAXIMUM_CONSOLE_LOGLEVEL=8
## Select power on after power fail setting
default CONFIG_MAINBOARD_POWER_ON_AFTER_POWER_FAIL="MAINBOARD_POWER_ON"
##
## CBFS
default CONFIG_CBFS=1
### End Options.lb
end

6
src/mainboard/ibm/e325/Options.lb
View File

@ -1,5 +1,4 @@
uses CONFIG_HAVE_MP_TABLE
uses CONFIG_CBFS
uses CONFIG_HAVE_PIRQ_TABLE
uses CONFIG_USE_FALLBACK_IMAGE
uses CONFIG_HAVE_FALLBACK_BOOT
@ -221,9 +220,4 @@ default CONFIG_MAXIMUM_CONSOLE_LOGLEVEL=8
default CONFIG_MAINBOARD_POWER_ON_AFTER_POWER_FAIL="MAINBOARD_POWER_ON"
### End Options.lb
#
# CBFS
#
#
default CONFIG_CBFS=1
end

6
src/mainboard/ibm/e326/Options.lb
View File

@ -1,5 +1,4 @@
uses CONFIG_HAVE_MP_TABLE
uses CONFIG_CBFS
uses CONFIG_HAVE_PIRQ_TABLE
uses CONFIG_USE_FALLBACK_IMAGE
uses CONFIG_HAVE_FALLBACK_BOOT
@ -227,9 +226,4 @@ default CONFIG_MAXIMUM_CONSOLE_LOGLEVEL=8
default CONFIG_MAINBOARD_POWER_ON_AFTER_POWER_FAIL="MAINBOARD_POWER_ON"
### End Options.lb
#
# CBFS
#
#
default CONFIG_CBFS=1
end

7
src/mainboard/iei/juki-511p/Options.lb
View File

@ -1,5 +1,4 @@
uses CONFIG_HAVE_MP_TABLE
uses CONFIG_CBFS
uses CONFIG_HAVE_PIRQ_TABLE
uses CONFIG_USE_FALLBACK_IMAGE
uses CONFIG_HAVE_FALLBACK_BOOT
@ -145,10 +144,4 @@ default HOSTCC="gcc"
default CONFIG_VIDEO_MB = 0
#
# CBFS
#
#
default CONFIG_CBFS=1
end

7
src/mainboard/iei/nova4899r/Options.lb
View File

@ -1,5 +1,4 @@
uses CONFIG_HAVE_MP_TABLE
uses CONFIG_CBFS
uses CONFIG_HAVE_PIRQ_TABLE
uses CONFIG_USE_FALLBACK_IMAGE
uses CONFIG_HAVE_FALLBACK_BOOT
@ -172,10 +171,4 @@ default CONFIG_MAXIMUM_CONSOLE_LOGLEVEL=8
default CONFIG_VIDEO_MB = 0
#
# CBFS
#
#
default CONFIG_CBFS=1
end

7
src/mainboard/iei/pcisa-lx-800-r10/Options.lb
View File

@ -19,7 +19,6 @@
##
uses CONFIG_HAVE_MP_TABLE
uses CONFIG_CBFS
uses CONFIG_HAVE_PIRQ_TABLE
uses CONFIG_USE_FALLBACK_IMAGE
uses CONFIG_HAVE_FALLBACK_BOOT
@ -106,10 +105,4 @@ default CONFIG_TTYS0_LCS = 0x3
default CONFIG_DEFAULT_CONSOLE_LOGLEVEL=8
default CONFIG_MAXIMUM_CONSOLE_LOGLEVEL=8
#
# CBFS
#
#
default CONFIG_CBFS=1
end

6
src/mainboard/intel/eagleheights/Options.lb
View File

@ -70,7 +70,6 @@ uses CONFIG_HAVE_SMI_HANDLER
uses CONFIG_PCIE_CONFIGSPACE_HOLE
uses CONFIG_MMCONF_SUPPORT
uses CONFIG_MMCONF_BASE_ADDRESS
uses CONFIG_CBFS
#
uses CONFIG_MAINBOARD
uses CONFIG_MAINBOARD_PART_NUMBER
@ -322,10 +321,5 @@ default CONFIG_MAXIMUM_CONSOLE_LOGLEVEL=9
## Select power on after power fail setting
default CONFIG_MAINBOARD_POWER_ON_AFTER_POWER_FAIL="MAINBOARD_POWER_ON"
#
# CBFS
#
default CONFIG_CBFS=1
### End Options.lb
end

6
src/mainboard/intel/jarrell/Options.lb
View File

@ -1,5 +1,4 @@
uses CONFIG_HAVE_MP_TABLE
uses CONFIG_CBFS
uses CONFIG_HAVE_PIRQ_TABLE
uses CONFIG_USE_FALLBACK_IMAGE
uses CONFIG_HAVE_FALLBACK_BOOT
@ -242,9 +241,4 @@ default CONFIG_CONSOLE_BTEXT=0
### End Options.lb
#
# CBFS
#
#
default CONFIG_CBFS=1
end

6
src/mainboard/intel/mtarvon/Options.lb
View File

@ -18,7 +18,6 @@
##
uses CONFIG_HAVE_MP_TABLE
uses CONFIG_CBFS
uses CONFIG_HAVE_PIRQ_TABLE
uses CONFIG_USE_FALLBACK_IMAGE
uses CONFIG_HAVE_FALLBACK_BOOT
@ -225,9 +224,4 @@ default CONFIG_MAXIMUM_CONSOLE_LOGLEVEL=5
default CONFIG_MAINBOARD_POWER_ON_AFTER_POWER_FAIL="MAINBOARD_POWER_ON"
### End Options.lb
#
# CBFS
#
#
default CONFIG_CBFS=1
end

7
src/mainboard/intel/truxton/Options.lb
View File

@ -18,7 +18,6 @@
##
uses CONFIG_HAVE_MP_TABLE
uses CONFIG_CBFS
uses CONFIG_HAVE_PIRQ_TABLE
uses CONFIG_USE_FALLBACK_IMAGE
uses CONFIG_HAVE_FALLBACK_BOOT
@ -236,10 +235,4 @@ default CONFIG_MAINBOARD_POWER_ON_AFTER_POWER_FAIL="MAINBOARD_POWER_ON"
### End Options.lb
#
# CBFS
#
#
default CONFIG_CBFS=1
end

6
src/mainboard/intel/xe7501devkit/Options.lb
View File

@ -1,5 +1,4 @@
uses CONFIG_HAVE_MP_TABLE
uses CONFIG_CBFS
uses CONFIG_HAVE_ACPI_TABLES
uses CONFIG_HAVE_ACPI_RESUME
uses CONFIG_HAVE_PIRQ_TABLE
@ -240,9 +239,4 @@ default CONFIG_DEBUG=1
# default CONFIG_CPU_OPT="-g"
### End Options.lb
#
# CBFS
#
#
default CONFIG_CBFS=1
end

6
src/mainboard/iwill/dk8_htx/Options.lb
View File

@ -1,5 +1,4 @@
uses CONFIG_HAVE_MP_TABLE
uses CONFIG_CBFS
uses CONFIG_HAVE_PIRQ_TABLE
uses CONFIG_HAVE_ACPI_TABLES
uses CONFIG_HAVE_ACPI_RESUME
@ -326,9 +325,4 @@ default CONFIG_MAXIMUM_CONSOLE_LOGLEVEL=8
default CONFIG_MAINBOARD_POWER_ON_AFTER_POWER_FAIL="MAINBOARD_POWER_ON"
### End Options.lb
#
# CBFS
#
#
default CONFIG_CBFS=1
end

6
src/mainboard/iwill/dk8s2/Options.lb
View File

@ -1,5 +1,4 @@
uses CONFIG_HAVE_MP_TABLE
uses CONFIG_CBFS
uses CONFIG_HAVE_PIRQ_TABLE
uses CONFIG_USE_FALLBACK_IMAGE
uses CONFIG_HAVE_FALLBACK_BOOT
@ -228,9 +227,4 @@ default CONFIG_MAXIMUM_CONSOLE_LOGLEVEL=8
default CONFIG_MAINBOARD_POWER_ON_AFTER_POWER_FAIL="MAINBOARD_POWER_ON"
### End Options.lb
#
# CBFS
#
#
default CONFIG_CBFS=1
end

6
src/mainboard/iwill/dk8x/Options.lb
View File

@ -1,5 +1,4 @@
uses CONFIG_HAVE_MP_TABLE
uses CONFIG_CBFS
uses CONFIG_HAVE_PIRQ_TABLE
uses CONFIG_USE_FALLBACK_IMAGE
uses CONFIG_HAVE_FALLBACK_BOOT
@ -227,9 +226,4 @@ default CONFIG_MAXIMUM_CONSOLE_LOGLEVEL=8
default CONFIG_MAINBOARD_POWER_ON_AFTER_POWER_FAIL="MAINBOARD_POWER_ON"
### End Options.lb
#
# CBFS
#
#
default CONFIG_CBFS=1
end

7
src/mainboard/jetway/j7f24/Options.lb
View File

@ -20,7 +20,6 @@
##
uses CONFIG_HAVE_MP_TABLE
uses CONFIG_CBFS
uses CONFIG_HAVE_PIRQ_TABLE
uses CONFIG_USE_FALLBACK_IMAGE
uses CONFIG_HAVE_FALLBACK_BOOT
@ -104,10 +103,4 @@ default HOSTCC = "gcc"
##
default CONFIG_MAX_PCI_BUSES = 3
#
# CBFS
#
#
default CONFIG_CBFS=1
end

6
src/mainboard/kontron/986lcd-m/Options.lb
View File

@ -71,7 +71,6 @@ uses CONFIG_PCIE_CONFIGSPACE_HOLE
uses CONFIG_MMCONF_SUPPORT
uses CONFIG_MMCONF_BASE_ADDRESS
uses CONFIG_GFXUMA
uses CONFIG_CBFS
#
uses CONFIG_MAINBOARD
@ -327,10 +326,5 @@ default CONFIG_MAXIMUM_CONSOLE_LOGLEVEL=9
## Select power on after power fail setting
default CONFIG_MAINBOARD_POWER_ON_AFTER_POWER_FAIL="MAINBOARD_POWER_ON"
#
# CBFS
#
default CONFIG_CBFS=1
### End Options.lb
end

7
src/mainboard/lippert/frontrunner/Options.lb
View File

@ -1,5 +1,4 @@
uses CONFIG_HAVE_MP_TABLE
uses CONFIG_CBFS
uses CONFIG_HAVE_PIRQ_TABLE
uses CONFIG_USE_FALLBACK_IMAGE
uses CONFIG_HAVE_FALLBACK_BOOT
@ -159,10 +158,4 @@ default CONFIG_DEFAULT_CONSOLE_LOGLEVEL=8
## At a maximum only compile in this level of debugging
default CONFIG_MAXIMUM_CONSOLE_LOGLEVEL=8
#
# CBFS
#
#
default CONFIG_CBFS=1
end

11
src/mainboard/lippert/roadrunner-lx/Options.lb
View File

@ -21,7 +21,6 @@
## Based on Options.lb from AMD's DB800 mainboard.
uses CONFIG_HAVE_MP_TABLE
uses CONFIG_CBFS
uses CONFIG_HAVE_PIRQ_TABLE
uses CONFIG_USE_FALLBACK_IMAGE
uses CONFIG_HAVE_FALLBACK_BOOT
@ -29,11 +28,6 @@ uses CONFIG_HAVE_HARD_RESET
uses CONFIG_HAVE_OPTION_TABLE
uses CONFIG_USE_OPTION_TABLE
uses CONFIG_ROM_PAYLOAD
uses CONFIG_IDE
uses CONFIG_FS_PAYLOAD
uses CONFIG_FS_EXT2
uses CONFIG_AUTOBOOT_DELAY
uses CONFIG_AUTOBOOT_CMDLINE
uses CONFIG_IRQ_SLOT_COUNT
uses CONFIG_MAINBOARD
uses CONFIG_MAINBOARD_VENDOR
@ -211,9 +205,4 @@ default CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 8
## At a maximum only compile in this level of debugging
default CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 8
#
# CBFS
#
#
default CONFIG_CBFS=1
end

11
src/mainboard/lippert/spacerunner-lx/Options.lb
View File

@ -21,7 +21,6 @@
## Based on Options.lb from AMD's DB800 mainboard.
uses CONFIG_HAVE_MP_TABLE
uses CONFIG_CBFS
uses CONFIG_HAVE_PIRQ_TABLE
uses CONFIG_USE_FALLBACK_IMAGE
uses CONFIG_HAVE_FALLBACK_BOOT
@ -29,11 +28,6 @@ uses CONFIG_HAVE_HARD_RESET
uses CONFIG_HAVE_OPTION_TABLE
uses CONFIG_USE_OPTION_TABLE
uses CONFIG_ROM_PAYLOAD
uses CONFIG_IDE
uses CONFIG_FS_PAYLOAD
uses CONFIG_FS_EXT2
uses CONFIG_AUTOBOOT_DELAY
uses CONFIG_AUTOBOOT_CMDLINE
uses CONFIG_IRQ_SLOT_COUNT
uses CONFIG_MAINBOARD
uses CONFIG_MAINBOARD_VENDOR
@ -211,9 +205,4 @@ default CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 8
## At a maximum only compile in this level of debugging
default CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 8
#
# CBFS
#
#
default CONFIG_CBFS=1
end

2
src/mainboard/mitac/6513wu/Options.lb
View File

@ -19,7 +19,6 @@
##
uses CC
uses CONFIG_CBFS
uses CONFIG_COMPRESSED_PAYLOAD_LZMA
uses CONFIG_CONSOLE_SERIAL8250
uses CONFIG_CONSOLE_VGA
@ -78,7 +77,6 @@ default CONFIG_ROM_IMAGE_SIZE = 128 * 1024
default CONFIG_FALLBACK_SIZE = CONFIG_ROM_IMAGE_SIZE
default CONFIG_HAVE_FALLBACK_BOOT = 1
default CONFIG_ROM_PAYLOAD = 1
default CONFIG_CBFS=1
# RAM layout
default CONFIG_RAMBASE = 0x00004000

6
src/mainboard/msi/ms6119/Options.lb
View File

@ -19,7 +19,6 @@
##
uses CONFIG_HAVE_MP_TABLE
uses CONFIG_CBFS
uses CONFIG_HAVE_PIRQ_TABLE
uses CONFIG_USE_FALLBACK_IMAGE
uses CONFIG_HAVE_FALLBACK_BOOT
@ -97,9 +96,4 @@ default CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 9
default CONFIG_CONSOLE_VGA = 1
default CONFIG_PCI_ROM_RUN = 1
#
# CBFS
#
#
default CONFIG_CBFS=1
end

6
src/mainboard/msi/ms6147/Options.lb
View File

@ -19,7 +19,6 @@
##
uses CONFIG_HAVE_MP_TABLE
uses CONFIG_CBFS
uses CONFIG_HAVE_PIRQ_TABLE
uses CONFIG_USE_FALLBACK_IMAGE
uses CONFIG_HAVE_FALLBACK_BOOT
@ -97,9 +96,4 @@ default CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 9
default CONFIG_CONSOLE_VGA = 1
default CONFIG_PCI_ROM_RUN = 1
#
# CBFS
#
#
default CONFIG_CBFS=1
end

2
src/mainboard/msi/ms6178/Options.lb
View File

@ -19,7 +19,6 @@
##
uses CONFIG_HAVE_MP_TABLE
uses CONFIG_CBFS
uses CONFIG_HAVE_PIRQ_TABLE
uses CONFIG_USE_FALLBACK_IMAGE
uses CONFIG_HAVE_FALLBACK_BOOT
@ -97,7 +96,6 @@ default CONFIG_UDELAY_TSC = 1
default CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 1
default CONFIG_CONSOLE_VGA = 1
default CONFIG_PCI_ROM_RUN = 1
default CONFIG_CBFS = 1
default CONFIG_HAVE_HIGH_TABLES = 1
default CONFIG_VIDEO_MB = 1
end

6
src/mainboard/msi/ms7135/Options.lb
View File

@ -21,7 +21,6 @@
##
uses CONFIG_HAVE_MP_TABLE
uses CONFIG_CBFS
uses CONFIG_HAVE_PIRQ_TABLE
uses CONFIG_USE_FALLBACK_IMAGE
uses CONFIG_USE_FAILOVER_IMAGE
@ -320,9 +319,4 @@ default CONFIG_MAXIMUM_CONSOLE_LOGLEVEL=8
default CONFIG_MAINBOARD_POWER_ON_AFTER_POWER_FAIL="MAINBOARD_POWER_ON"
### End Options.lb
#
# CBFS
#
#
default CONFIG_CBFS=1
end

6
src/mainboard/msi/ms7260/Options.lb
View File

@ -19,7 +19,6 @@
##
uses CONFIG_HAVE_MP_TABLE
uses CONFIG_CBFS
uses CONFIG_HAVE_PIRQ_TABLE
uses CONFIG_USE_FALLBACK_IMAGE
uses CONFIG_USE_FAILOVER_IMAGE
@ -186,9 +185,4 @@ default CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 9
default CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 9
default CONFIG_MAINBOARD_POWER_ON_AFTER_POWER_FAIL = "MAINBOARD_POWER_ON"
#
# CBFS
#
#
default CONFIG_CBFS=1
end

6
src/mainboard/msi/ms9185/Options.lb
View File

@ -23,7 +23,6 @@
##
uses CONFIG_HAVE_MP_TABLE
uses CONFIG_CBFS
uses CONFIG_HAVE_PIRQ_TABLE
uses CONFIG_HAVE_ACPI_TABLES
uses CONFIG_HAVE_ACPI_RESUME
@ -327,9 +326,4 @@ default CONFIG_MAXIMUM_CONSOLE_LOGLEVEL=8
default CONFIG_MAINBOARD_POWER_ON_AFTER_POWER_FAIL="MAINBOARD_POWER_ON"
### End Options.lb
#
# CBFS
#
#
default CONFIG_CBFS=1
end

6
src/mainboard/msi/ms9282/Options.lb
View File

@ -23,7 +23,6 @@
##
uses CONFIG_HAVE_MP_TABLE
uses CONFIG_CBFS
uses CONFIG_HAVE_PIRQ_TABLE
uses CONFIG_USE_FALLBACK_IMAGE
uses CONFIG_HAVE_FALLBACK_BOOT
@ -307,9 +306,4 @@ default CONFIG_MAXIMUM_CONSOLE_LOGLEVEL=8
default CONFIG_MAINBOARD_POWER_ON_AFTER_POWER_FAIL="MAINBOARD_POWER_ON"
### End Options.lb
#
# CBFS
#
#
default CONFIG_CBFS=1
end

6
src/mainboard/nec/powermate2000/Options.lb
View File

@ -19,7 +19,6 @@
##
uses CONFIG_HAVE_MP_TABLE
uses CONFIG_CBFS
uses CONFIG_HAVE_PIRQ_TABLE
uses CONFIG_USE_FALLBACK_IMAGE
uses CONFIG_HAVE_FALLBACK_BOOT
@ -96,9 +95,4 @@ default CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 1
default CONFIG_CONSOLE_VGA = 1
default CONFIG_PCI_ROM_RUN = 1
#
# CBFS
#
#
default CONFIG_CBFS=1
end

6
src/mainboard/newisys/khepri/Options.lb
View File

@ -1,5 +1,4 @@
uses CONFIG_HAVE_MP_TABLE
uses CONFIG_CBFS
uses CONFIG_HAVE_PIRQ_TABLE
uses CONFIG_USE_FALLBACK_IMAGE
uses CONFIG_HAVE_FALLBACK_BOOT
@ -243,9 +242,4 @@ default CONFIG_MAXIMUM_CONSOLE_LOGLEVEL=8
default CONFIG_MAINBOARD_POWER_ON_AFTER_POWER_FAIL="MAINBOARD_POWER_ON"
### End Options.lb
#
# CBFS
#
#
default CONFIG_CBFS=1
end

6
src/mainboard/nvidia/l1_2pvv/Options.lb
View File

@ -20,7 +20,6 @@
##
uses CONFIG_HAVE_MP_TABLE
uses CONFIG_CBFS
uses CONFIG_HAVE_PIRQ_TABLE
uses CONFIG_HAVE_ACPI_TABLES
uses CONFIG_HAVE_ACPI_RESUME
@ -349,9 +348,4 @@ default CONFIG_MAXIMUM_CONSOLE_LOGLEVEL=8
default CONFIG_MAINBOARD_POWER_ON_AFTER_POWER_FAIL="MAINBOARD_POWER_ON"
### End Options.lb
#
# CBFS
#
#
default CONFIG_CBFS=1
end

7
src/mainboard/olpc/btest/Options.lb
View File

@ -1,5 +1,4 @@
uses CONFIG_HAVE_MP_TABLE
uses CONFIG_CBFS
uses CONFIG_HAVE_PIRQ_TABLE
uses CONFIG_USE_FALLBACK_IMAGE
uses CONFIG_HAVE_FALLBACK_BOOT
@ -160,10 +159,4 @@ default CONFIG_DEFAULT_CONSOLE_LOGLEVEL=8
## At a maximum only compile in this level of debugging
default CONFIG_MAXIMUM_CONSOLE_LOGLEVEL=8
#
# CBFS
#
#
default CONFIG_CBFS=1
end

7
src/mainboard/olpc/rev_a/Options.lb
View File

@ -1,5 +1,4 @@
uses CONFIG_HAVE_MP_TABLE
uses CONFIG_CBFS
uses CONFIG_HAVE_PIRQ_TABLE
uses CONFIG_USE_FALLBACK_IMAGE
uses CONFIG_HAVE_FALLBACK_BOOT
@ -160,10 +159,4 @@ default CONFIG_DEFAULT_CONSOLE_LOGLEVEL=8
## At a maximum only compile in this level of debugging
default CONFIG_MAXIMUM_CONSOLE_LOGLEVEL=8
#
# CBFS
#
#
default CONFIG_CBFS=1
end

7
src/mainboard/pcengines/alix1c/Options.lb
View File

@ -19,7 +19,6 @@
##
uses CONFIG_HAVE_MP_TABLE
uses CONFIG_CBFS
uses CONFIG_HAVE_PIRQ_TABLE
uses CONFIG_USE_FALLBACK_IMAGE
uses CONFIG_HAVE_FALLBACK_BOOT
@ -198,10 +197,4 @@ default CONFIG_DEFAULT_CONSOLE_LOGLEVEL=8
## At a maximum only compile in this level of debugging
default CONFIG_MAXIMUM_CONSOLE_LOGLEVEL=8
#
# CBFS
#
#
default CONFIG_CBFS=1
end

6
src/mainboard/rca/rm4100/Options.lb
View File

@ -19,7 +19,6 @@
##
uses CC
uses CONFIG_CBFS
uses CONFIG_CONSOLE_SERIAL8250
uses CONFIG_CONSOLE_VGA
uses CONFIG_COMPRESSED_PAYLOAD_LZMA
@ -96,9 +95,4 @@ default CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 9
default CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 9
default CONFIG_MAINBOARD_VENDOR = "RCA"
default CONFIG_MAINBOARD_PART_NUMBER = "RM4100"
#
# CBFS
#
#
default CONFIG_CBFS=1
end

2
src/mainboard/soyo/sy-6ba-plus-iii/Options.lb
View File

@ -19,7 +19,6 @@
##
uses CONFIG_HAVE_MP_TABLE
uses CONFIG_CBFS
uses CONFIG_HAVE_PIRQ_TABLE
uses CONFIG_USE_FALLBACK_IMAGE
uses CONFIG_HAVE_FALLBACK_BOOT
@ -96,5 +95,4 @@ default CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 9
default CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 9
default CONFIG_CONSOLE_VGA = 1
default CONFIG_PCI_ROM_RUN = 1
default CONFIG_CBFS=1
end

6
src/mainboard/sunw/ultra40/Options.lb
View File

@ -1,5 +1,4 @@
uses CONFIG_HAVE_MP_TABLE
uses CONFIG_CBFS
uses CONFIG_HAVE_PIRQ_TABLE
uses CONFIG_USE_FALLBACK_IMAGE
uses CONFIG_HAVE_FALLBACK_BOOT
@ -276,9 +275,4 @@ default CONFIG_MAXIMUM_CONSOLE_LOGLEVEL=8
default CONFIG_MAINBOARD_POWER_ON_AFTER_POWER_FAIL="MAINBOARD_POWER_ON"
### End Options.lb
#
# CBFS
#
#
default CONFIG_CBFS=1
end

6
src/mainboard/supermicro/h8dme/Options.lb
View File

@ -20,7 +20,6 @@
##
uses CONFIG_HAVE_MP_TABLE
uses CONFIG_CBFS
uses CONFIG_HAVE_PIRQ_TABLE
uses CONFIG_HAVE_ACPI_TABLES
uses CONFIG_HAVE_ACPI_RESUME
@ -351,9 +350,4 @@ default CONFIG_MAXIMUM_CONSOLE_LOGLEVEL=9
default CONFIG_MAINBOARD_POWER_ON_AFTER_POWER_FAIL="MAINBOARD_POWER_ON"
### End Options.lb
#
# CBFS
#
#
default CONFIG_CBFS=1
end

Some files were not shown because too many files have changed in this diff Show More