intel/quark: Remove extra steps on entry to romstage
Change-Id: I9297d5b4f7c8ed703fb8772739531cdd7d5ca5f0 Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/34965 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Arthur Heymans <arthur@aheymans.xyz> Reviewed-by: Angel Pons <th3fanbus@gmail.com>
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@ -25,7 +25,6 @@
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#include <soc/car.h>
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#include <soc/car.h>
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#include <soc/reg_access.h>
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#include <soc/reg_access.h>
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asmlinkage void car_stage_c_entry(void);
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void clear_smi_and_wake_events(void);
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void clear_smi_and_wake_events(void);
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void disable_rom_shadow(void);
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void disable_rom_shadow(void);
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void *locate_rmu_file(size_t *rmu_file_len);
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void *locate_rmu_file(size_t *rmu_file_len);
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@ -14,7 +14,6 @@
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#
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#
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romstage-y += car.c
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romstage-y += car.c
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romstage-y += car_stage_entry.S
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ifeq ($(CONFIG_PLATFORM_USES_FSP2_0),y)
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ifeq ($(CONFIG_PLATFORM_USES_FSP2_0),y)
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romstage-$(CONFIG_DISPLAY_UPD_DATA) += debug.c
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romstage-$(CONFIG_DISPLAY_UPD_DATA) += debug.c
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romstage-$(CONFIG_PLATFORM_USES_FSP2_0) += fsp2_0.c
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romstage-$(CONFIG_PLATFORM_USES_FSP2_0) += fsp2_0.c
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@ -1,72 +0,0 @@
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/*
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* This file is part of the coreboot project.
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*
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* Copyright (C) 2000,2007 Ronald G. Minnich <rminnich@gmail.com>
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* Copyright (C) 2007-2008 coresystems GmbH
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* Copyright (C) 2013-2014 Sage Electronic Engineering, LLC.
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* Copyright (C) 2015-2016 Intel Corporation
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; version 2 of the License.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* Replacement for cache_as_ram.inc when using the C environment boot block.
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*/
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#include <rules.h>
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#include <soc/sd.h>
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.section ".text"
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.global car_stage_entry
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car_stage_entry:
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/* Enter the C code */
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call car_stage_c_entry
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/* The code should never reach this point */
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movb $0x69, %ah
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jmp .Lhlt
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#----------------------------------------------------------------------------
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#
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# Procedure: .Lhlt
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#
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# Input: ah - Upper 8-bits of POST code
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# al - Lower 8-bits of POST code
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#
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# Description:
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# Infinite loop displaying alternating POST code values
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#
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#----------------------------------------------------------------------------
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#define FLASH_DELAY 0x1000 /* I/O delay between post codes on failure */
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#define POST_DELAY 0x50
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.Lhlt:
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xchg %al, %ah
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mov $POST_DELAY, %dh
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#if CONFIG(POST_IO)
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outb %al, $CONFIG_POST_IO_PORT
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#else
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post_code(POST_DEAD_CODE)
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#endif
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.flash_setup:
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movl $FLASH_DELAY, %ecx
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.flash_delay:
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outb %al, $0xED
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loop .flash_delay
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#if CONFIG(ENABLE_DEBUG_LED)
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movl $SD_HOST_CTRL, %ebx
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movb 0(%ebx), %dl
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xorb $1, %dl
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movb %dl, 0(%ebx)
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#endif /* CONFIG_ENABLE_DEBUG_LED */
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decb %dh
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jnz .flash_setup
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jmp .Lhlt
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@ -30,7 +30,7 @@
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static struct postcar_frame early_mtrrs;
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static struct postcar_frame early_mtrrs;
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asmlinkage void car_stage_c_entry(void)
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asmlinkage void car_stage_entry(void)
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{
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{
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bool s3wake;
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bool s3wake;
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