ibexpeak: Move to common FADT
Change-Id: Ibb4dcc4356876f6385e79c10d8296fb680937827 Signed-off-by: Vladimir Serbinenko <phcoder@gmail.com> Reviewed-on: http://review.coreboot.org/7201 Reviewed-by: Nicolas Reinecke <nr@das-labor.org> Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com> Tested-by: build bot (Jenkins)
This commit is contained in:
Vladimir Serbinenko
parent
5b044ae607
commit
67bfbfdfeb
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@ -118,6 +118,10 @@ chip northbridge/intel/nehalem
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register "gen3_dec" = "0x1c1681"
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register "gen3_dec" = "0x1c1681"
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register "gen4_dec" = "0x040069"
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register "gen4_dec" = "0x040069"
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register "p_cnt_throttling_supported" = "1"
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register "c2_latency" = "1"
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register "docking_supported" = "1"
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device pci 16.2 on # IDE/SATA
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device pci 16.2 on # IDE/SATA
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subsystemid 0x17aa 0x2161
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subsystemid 0x17aa 0x2161
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end
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end
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@ -1,160 +0,0 @@
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/*
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* This file is part of the coreboot project.
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*
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* Copyright (C) 2007-2008 coresystems GmbH
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; version 2 of
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* the License.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston,
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* MA 02110-1301 USA
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*/
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#include <string.h>
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#include <device/pci.h>
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#include <arch/acpi.h>
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#include <cpu/x86/smm.h>
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/* FIXME: This needs to go into a separate .h file
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* to be included by the ich7 smi handler, ich7 smi init
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* code and the mainboard fadt.
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*/
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void acpi_create_fadt(acpi_fadt_t * fadt, acpi_facs_t * facs, void *dsdt)
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{
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acpi_header_t *header = &(fadt->header);
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u16 pmbase =
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pci_read_config16(dev_find_slot(0, PCI_DEVFN(0x1f, 0)),
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0x40) & 0xfffe;
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memset((void *)fadt, 0, sizeof(acpi_fadt_t));
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memcpy(header->signature, "FACP", 4);
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header->length = sizeof(acpi_fadt_t);
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header->revision = 3;
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memcpy(header->oem_id, OEM_ID, 6);
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memcpy(header->oem_table_id, ACPI_TABLE_CREATOR, 8);
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memcpy(header->asl_compiler_id, ASLC, 4);
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header->asl_compiler_revision = 0;
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fadt->firmware_ctrl = (unsigned long)facs;
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fadt->dsdt = (unsigned long)dsdt;
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fadt->model = 0x00;
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fadt->preferred_pm_profile = PM_MOBILE;
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fadt->sci_int = 0x9;
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fadt->smi_cmd = APM_CNT;
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fadt->acpi_enable = APM_CNT_ACPI_ENABLE;
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fadt->acpi_disable = APM_CNT_ACPI_DISABLE;
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fadt->s4bios_req = 0x0;
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fadt->pstate_cnt = APM_CNT_PST_CONTROL;
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fadt->pm1a_evt_blk = pmbase;
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fadt->pm1b_evt_blk = 0x0;
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fadt->pm1a_cnt_blk = pmbase + 0x4;
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fadt->pm1b_cnt_blk = 0x0;
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fadt->pm2_cnt_blk = pmbase + 0x50;
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fadt->pm_tmr_blk = pmbase + 0x8;
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fadt->gpe0_blk = pmbase + 0x20;
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fadt->gpe1_blk = 0;
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fadt->pm1_evt_len = 4;
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fadt->pm1_cnt_len = 2;
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fadt->pm2_cnt_len = 1;
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fadt->pm_tmr_len = 4;
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fadt->gpe0_blk_len = 0x10;
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fadt->gpe1_blk_len = 0;
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fadt->gpe1_base = 0;
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fadt->cst_cnt = APM_CNT_CST_CONTROL;
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fadt->p_lvl2_lat = 1;
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fadt->p_lvl3_lat = 0x23;
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fadt->flush_size = 0;
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fadt->flush_stride = 0;
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fadt->duty_offset = 1;
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fadt->duty_width = 3;
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fadt->day_alrm = 0xd;
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fadt->mon_alrm = 0x00;
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fadt->century = 0x32;
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fadt->iapc_boot_arch = 0x00;
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fadt->flags = ACPI_FADT_WBINVD | ACPI_FADT_C1_SUPPORTED |
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ACPI_FADT_SLEEP_BUTTON | ACPI_FADT_S4_RTC_WAKE |
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ACPI_FADT_DOCKING_SUPPORTED;
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fadt->reset_reg.space_id = 0;
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fadt->reset_reg.bit_width = 0;
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fadt->reset_reg.bit_offset = 0;
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fadt->reset_reg.resv = 0;
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fadt->reset_reg.addrl = 0x0;
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fadt->reset_reg.addrh = 0x0;
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fadt->reset_value = 0;
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fadt->x_firmware_ctl_l = (unsigned long)facs;
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fadt->x_firmware_ctl_h = 0;
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fadt->x_dsdt_l = (unsigned long)dsdt;
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fadt->x_dsdt_h = 0;
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fadt->x_pm1a_evt_blk.space_id = 1;
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fadt->x_pm1a_evt_blk.bit_width = 32;
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fadt->x_pm1a_evt_blk.bit_offset = 0;
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fadt->x_pm1a_evt_blk.resv = 0;
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fadt->x_pm1a_evt_blk.addrl = pmbase;
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fadt->x_pm1a_evt_blk.addrh = 0x0;
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fadt->x_pm1b_evt_blk.space_id = 0;
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fadt->x_pm1b_evt_blk.bit_width = 0;
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fadt->x_pm1b_evt_blk.bit_offset = 0;
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fadt->x_pm1b_evt_blk.resv = 0;
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fadt->x_pm1b_evt_blk.addrl = 0x0;
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fadt->x_pm1b_evt_blk.addrh = 0x0;
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fadt->x_pm1a_cnt_blk.space_id = 1;
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fadt->x_pm1a_cnt_blk.bit_width = 32;
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fadt->x_pm1a_cnt_blk.bit_offset = 0;
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fadt->x_pm1a_cnt_blk.resv = 0;
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fadt->x_pm1a_cnt_blk.addrl = pmbase + 0x4;
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fadt->x_pm1a_cnt_blk.addrh = 0x0;
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fadt->x_pm1b_cnt_blk.space_id = 0;
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fadt->x_pm1b_cnt_blk.bit_width = 0;
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fadt->x_pm1b_cnt_blk.bit_offset = 0;
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fadt->x_pm1b_cnt_blk.resv = 0;
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fadt->x_pm1b_cnt_blk.addrl = 0x0;
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fadt->x_pm1b_cnt_blk.addrh = 0x0;
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fadt->x_pm2_cnt_blk.space_id = 1;
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fadt->x_pm2_cnt_blk.bit_width = 8;
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fadt->x_pm2_cnt_blk.bit_offset = 0;
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fadt->x_pm2_cnt_blk.resv = 0;
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fadt->x_pm2_cnt_blk.addrl = pmbase + 0x50;
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fadt->x_pm2_cnt_blk.addrh = 0x0;
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fadt->x_pm_tmr_blk.space_id = 1;
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fadt->x_pm_tmr_blk.bit_width = 32;
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fadt->x_pm_tmr_blk.bit_offset = 0;
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fadt->x_pm_tmr_blk.resv = 0;
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fadt->x_pm_tmr_blk.addrl = pmbase + 0x8;
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fadt->x_pm_tmr_blk.addrh = 0x0;
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fadt->x_gpe0_blk.space_id = 1;
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fadt->x_gpe0_blk.bit_width = 128;
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fadt->x_gpe0_blk.bit_offset = 0;
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fadt->x_gpe0_blk.resv = 0;
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fadt->x_gpe0_blk.addrl = pmbase + 0x20;
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fadt->x_gpe0_blk.addrh = 0x0;
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fadt->x_gpe1_blk.space_id = 0;
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fadt->x_gpe1_blk.bit_width = 0;
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fadt->x_gpe1_blk.bit_offset = 0;
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fadt->x_gpe1_blk.resv = 0;
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fadt->x_gpe1_blk.addrl = 0x0;
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fadt->x_gpe1_blk.addrh = 0x0;
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header->checksum = acpi_checksum((void *)fadt, header->length);
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}
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@ -1,160 +0,0 @@
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/*
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* This file is part of the coreboot project.
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*
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* Copyright (C) 2007-2008 coresystems GmbH
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; version 2 of
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* the License.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston,
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* MA 02110-1301 USA
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*/
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#include <string.h>
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#include <device/pci.h>
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#include <arch/acpi.h>
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#include <cpu/x86/smm.h>
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/* FIXME: This needs to go into a separate .h file
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* to be included by the ich7 smi handler, ich7 smi init
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* code and the mainboard fadt.
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*/
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void acpi_create_fadt(acpi_fadt_t * fadt, acpi_facs_t * facs, void *dsdt)
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{
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acpi_header_t *header = &(fadt->header);
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u16 pmbase =
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pci_read_config16(dev_find_slot(0, PCI_DEVFN(0x1f, 0)),
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0x40) & 0xfffe;
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memset((void *)fadt, 0, sizeof(acpi_fadt_t));
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memcpy(header->signature, "FACP", 4);
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header->length = sizeof(acpi_fadt_t);
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header->revision = 3;
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memcpy(header->oem_id, OEM_ID, 6);
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memcpy(header->oem_table_id, ACPI_TABLE_CREATOR, 8);
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memcpy(header->asl_compiler_id, ASLC, 4);
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header->asl_compiler_revision = 0;
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fadt->firmware_ctrl = (unsigned long)facs;
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fadt->dsdt = (unsigned long)dsdt;
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fadt->model = 0x00;
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fadt->preferred_pm_profile = PM_MOBILE;
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fadt->sci_int = 0x9;
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fadt->smi_cmd = APM_CNT;
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fadt->acpi_enable = APM_CNT_ACPI_ENABLE;
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fadt->acpi_disable = APM_CNT_ACPI_DISABLE;
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fadt->s4bios_req = 0x0;
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fadt->pstate_cnt = APM_CNT_PST_CONTROL;
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fadt->pm1a_evt_blk = pmbase;
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fadt->pm1b_evt_blk = 0x0;
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fadt->pm1a_cnt_blk = pmbase + 0x4;
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fadt->pm1b_cnt_blk = 0x0;
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fadt->pm2_cnt_blk = pmbase + 0x50;
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fadt->pm_tmr_blk = pmbase + 0x8;
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fadt->gpe0_blk = pmbase + 0x20;
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fadt->gpe1_blk = 0;
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fadt->pm1_evt_len = 4;
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fadt->pm1_cnt_len = 2;
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fadt->pm2_cnt_len = 1;
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fadt->pm_tmr_len = 4;
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fadt->gpe0_blk_len = 0x10;
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fadt->gpe1_blk_len = 0;
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fadt->gpe1_base = 0;
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fadt->cst_cnt = APM_CNT_CST_CONTROL;
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fadt->p_lvl2_lat = 1;
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fadt->p_lvl3_lat = 0x23;
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fadt->flush_size = 0;
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fadt->flush_stride = 0;
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fadt->duty_offset = 1;
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fadt->duty_width = 3;
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fadt->day_alrm = 0xd;
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fadt->mon_alrm = 0x00;
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fadt->century = 0x32;
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fadt->iapc_boot_arch = 0x00;
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fadt->flags = ACPI_FADT_WBINVD | ACPI_FADT_C1_SUPPORTED |
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ACPI_FADT_SLEEP_BUTTON | ACPI_FADT_S4_RTC_WAKE |
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ACPI_FADT_DOCKING_SUPPORTED;
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fadt->reset_reg.space_id = 0;
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fadt->reset_reg.bit_width = 0;
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fadt->reset_reg.bit_offset = 0;
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fadt->reset_reg.resv = 0;
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fadt->reset_reg.addrl = 0x0;
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fadt->reset_reg.addrh = 0x0;
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fadt->reset_value = 0;
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fadt->x_firmware_ctl_l = (unsigned long)facs;
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fadt->x_firmware_ctl_h = 0;
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fadt->x_dsdt_l = (unsigned long)dsdt;
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fadt->x_dsdt_h = 0;
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fadt->x_pm1a_evt_blk.space_id = 1;
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fadt->x_pm1a_evt_blk.bit_width = 32;
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fadt->x_pm1a_evt_blk.bit_offset = 0;
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fadt->x_pm1a_evt_blk.resv = 0;
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fadt->x_pm1a_evt_blk.addrl = pmbase;
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fadt->x_pm1a_evt_blk.addrh = 0x0;
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fadt->x_pm1b_evt_blk.space_id = 0;
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fadt->x_pm1b_evt_blk.bit_width = 0;
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fadt->x_pm1b_evt_blk.bit_offset = 0;
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fadt->x_pm1b_evt_blk.resv = 0;
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fadt->x_pm1b_evt_blk.addrl = 0x0;
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fadt->x_pm1b_evt_blk.addrh = 0x0;
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fadt->x_pm1a_cnt_blk.space_id = 1;
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fadt->x_pm1a_cnt_blk.bit_width = 32;
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fadt->x_pm1a_cnt_blk.bit_offset = 0;
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fadt->x_pm1a_cnt_blk.resv = 0;
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fadt->x_pm1a_cnt_blk.addrl = pmbase + 0x4;
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fadt->x_pm1a_cnt_blk.addrh = 0x0;
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fadt->x_pm1b_cnt_blk.space_id = 0;
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fadt->x_pm1b_cnt_blk.bit_width = 0;
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fadt->x_pm1b_cnt_blk.bit_offset = 0;
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fadt->x_pm1b_cnt_blk.resv = 0;
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fadt->x_pm1b_cnt_blk.addrl = 0x0;
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fadt->x_pm1b_cnt_blk.addrh = 0x0;
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|
||||||
|
|
||||||
fadt->x_pm2_cnt_blk.space_id = 1;
|
|
||||||
fadt->x_pm2_cnt_blk.bit_width = 8;
|
|
||||||
fadt->x_pm2_cnt_blk.bit_offset = 0;
|
|
||||||
fadt->x_pm2_cnt_blk.resv = 0;
|
|
||||||
fadt->x_pm2_cnt_blk.addrl = pmbase + 0x50;
|
|
||||||
fadt->x_pm2_cnt_blk.addrh = 0x0;
|
|
||||||
|
|
||||||
fadt->x_pm_tmr_blk.space_id = 1;
|
|
||||||
fadt->x_pm_tmr_blk.bit_width = 32;
|
|
||||||
fadt->x_pm_tmr_blk.bit_offset = 0;
|
|
||||||
fadt->x_pm_tmr_blk.resv = 0;
|
|
||||||
fadt->x_pm_tmr_blk.addrl = pmbase + 0x8;
|
|
||||||
fadt->x_pm_tmr_blk.addrh = 0x0;
|
|
||||||
|
|
||||||
fadt->x_gpe0_blk.space_id = 1;
|
|
||||||
fadt->x_gpe0_blk.bit_width = 128;
|
|
||||||
fadt->x_gpe0_blk.bit_offset = 0;
|
|
||||||
fadt->x_gpe0_blk.resv = 0;
|
|
||||||
fadt->x_gpe0_blk.addrl = pmbase + 0x20;
|
|
||||||
fadt->x_gpe0_blk.addrh = 0x0;
|
|
||||||
|
|
||||||
fadt->x_gpe1_blk.space_id = 0;
|
|
||||||
fadt->x_gpe1_blk.bit_width = 0;
|
|
||||||
fadt->x_gpe1_blk.bit_offset = 0;
|
|
||||||
fadt->x_gpe1_blk.resv = 0;
|
|
||||||
fadt->x_gpe1_blk.addrl = 0x0;
|
|
||||||
fadt->x_gpe1_blk.addrh = 0x0;
|
|
||||||
|
|
||||||
header->checksum = acpi_checksum((void *)fadt, header->length);
|
|
||||||
}
|
|
||||||
|
|
@ -35,6 +35,7 @@ config SOUTH_BRIDGE_OPTIONS # dummy
|
||||||
select SOUTHBRIDGE_INTEL_COMMON
|
select SOUTHBRIDGE_INTEL_COMMON
|
||||||
select HAVE_USBDEBUG_OPTIONS
|
select HAVE_USBDEBUG_OPTIONS
|
||||||
select PER_DEVICE_ACPI_TABLES
|
select PER_DEVICE_ACPI_TABLES
|
||||||
|
select COMMON_FADT
|
||||||
|
|
||||||
config EHCI_BAR
|
config EHCI_BAR
|
||||||
hex
|
hex
|
||||||
|
|
|
||||||
|
|
@ -35,6 +35,7 @@
|
||||||
#include <drivers/intel/gma/i915.h>
|
#include <drivers/intel/gma/i915.h>
|
||||||
#include <cbmem.h>
|
#include <cbmem.h>
|
||||||
#include <string.h>
|
#include <string.h>
|
||||||
|
#include <cpu/x86/smm.h>
|
||||||
#include "pch.h"
|
#include "pch.h"
|
||||||
#include "nvs.h"
|
#include "nvs.h"
|
||||||
|
|
||||||
|
|
@ -691,6 +692,137 @@ static void southbridge_inject_dsdt(void)
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
|
void acpi_fill_fadt(acpi_fadt_t *fadt)
|
||||||
|
{
|
||||||
|
device_t dev = dev_find_slot(0, PCI_DEVFN(0x1f,0));
|
||||||
|
config_t *chip = dev->chip_info;
|
||||||
|
u16 pmbase = pci_read_config16(dev, 0x40) & 0xfffe;
|
||||||
|
int c2_latency;
|
||||||
|
|
||||||
|
fadt->model = 1;
|
||||||
|
|
||||||
|
fadt->sci_int = 0x9;
|
||||||
|
fadt->smi_cmd = APM_CNT;
|
||||||
|
fadt->acpi_enable = APM_CNT_ACPI_ENABLE;
|
||||||
|
fadt->acpi_disable = APM_CNT_ACPI_DISABLE;
|
||||||
|
fadt->s4bios_req = 0x0;
|
||||||
|
fadt->pstate_cnt = 0;
|
||||||
|
|
||||||
|
fadt->pm1a_evt_blk = pmbase;
|
||||||
|
fadt->pm1b_evt_blk = 0x0;
|
||||||
|
fadt->pm1a_cnt_blk = pmbase + 0x4;
|
||||||
|
fadt->pm1b_cnt_blk = 0x0;
|
||||||
|
fadt->pm2_cnt_blk = pmbase + 0x50;
|
||||||
|
fadt->pm_tmr_blk = pmbase + 0x8;
|
||||||
|
fadt->gpe0_blk = pmbase + 0x20;
|
||||||
|
fadt->gpe1_blk = 0;
|
||||||
|
|
||||||
|
fadt->pm1_evt_len = 4;
|
||||||
|
fadt->pm1_cnt_len = 2;
|
||||||
|
fadt->pm2_cnt_len = 1;
|
||||||
|
fadt->pm_tmr_len = 4;
|
||||||
|
fadt->gpe0_blk_len = 16;
|
||||||
|
fadt->gpe1_blk_len = 0;
|
||||||
|
fadt->gpe1_base = 0;
|
||||||
|
fadt->cst_cnt = 0;
|
||||||
|
c2_latency = chip->c2_latency;
|
||||||
|
if (!c2_latency) {
|
||||||
|
c2_latency = 101; /* c2 unsupported */
|
||||||
|
}
|
||||||
|
fadt->p_lvl2_lat = c2_latency;
|
||||||
|
fadt->p_lvl3_lat = 87;
|
||||||
|
fadt->flush_size = 1024;
|
||||||
|
fadt->flush_stride = 16;
|
||||||
|
fadt->duty_offset = 1;
|
||||||
|
if (chip->p_cnt_throttling_supported) {
|
||||||
|
fadt->duty_width = 3;
|
||||||
|
} else {
|
||||||
|
fadt->duty_width = 0;
|
||||||
|
}
|
||||||
|
fadt->day_alrm = 0xd;
|
||||||
|
fadt->mon_alrm = 0x00;
|
||||||
|
fadt->century = 0x32;
|
||||||
|
fadt->iapc_boot_arch = ACPI_FADT_LEGACY_DEVICES | ACPI_FADT_8042;
|
||||||
|
|
||||||
|
fadt->flags = ACPI_FADT_WBINVD |
|
||||||
|
ACPI_FADT_C1_SUPPORTED |
|
||||||
|
ACPI_FADT_SLEEP_BUTTON |
|
||||||
|
ACPI_FADT_RESET_REGISTER |
|
||||||
|
ACPI_FADT_S4_RTC_WAKE |
|
||||||
|
ACPI_FADT_PLATFORM_CLOCK;
|
||||||
|
if (chip->docking_supported) {
|
||||||
|
fadt->flags |= ACPI_FADT_DOCKING_SUPPORTED;
|
||||||
|
}
|
||||||
|
if (c2_latency < 100) {
|
||||||
|
fadt->flags |= ACPI_FADT_C2_MP_SUPPORTED;
|
||||||
|
}
|
||||||
|
|
||||||
|
fadt->reset_reg.space_id = 1;
|
||||||
|
fadt->reset_reg.bit_width = 8;
|
||||||
|
fadt->reset_reg.bit_offset = 0;
|
||||||
|
fadt->reset_reg.access_size = ACPI_ACCESS_SIZE_BYTE_ACCESS;
|
||||||
|
fadt->reset_reg.addrl = 0xcf9;
|
||||||
|
fadt->reset_reg.addrh = 0;
|
||||||
|
|
||||||
|
fadt->reset_value = 6;
|
||||||
|
|
||||||
|
fadt->x_pm1a_evt_blk.space_id = 1;
|
||||||
|
fadt->x_pm1a_evt_blk.bit_width = 32;
|
||||||
|
fadt->x_pm1a_evt_blk.bit_offset = 0;
|
||||||
|
fadt->x_pm1a_evt_blk.access_size = ACPI_ACCESS_SIZE_DWORD_ACCESS;
|
||||||
|
fadt->x_pm1a_evt_blk.addrl = pmbase;
|
||||||
|
fadt->x_pm1a_evt_blk.addrh = 0x0;
|
||||||
|
|
||||||
|
fadt->x_pm1b_evt_blk.space_id = 1;
|
||||||
|
fadt->x_pm1b_evt_blk.bit_width = 0;
|
||||||
|
fadt->x_pm1b_evt_blk.bit_offset = 0;
|
||||||
|
fadt->x_pm1b_evt_blk.access_size = 0;
|
||||||
|
fadt->x_pm1b_evt_blk.addrl = 0x0;
|
||||||
|
fadt->x_pm1b_evt_blk.addrh = 0x0;
|
||||||
|
|
||||||
|
fadt->x_pm1a_cnt_blk.space_id = 1;
|
||||||
|
fadt->x_pm1a_cnt_blk.bit_width = 16;
|
||||||
|
fadt->x_pm1a_cnt_blk.bit_offset = 0;
|
||||||
|
fadt->x_pm1a_cnt_blk.access_size = ACPI_ACCESS_SIZE_WORD_ACCESS;
|
||||||
|
fadt->x_pm1a_cnt_blk.addrl = pmbase + 0x4;
|
||||||
|
fadt->x_pm1a_cnt_blk.addrh = 0x0;
|
||||||
|
|
||||||
|
fadt->x_pm1b_cnt_blk.space_id = 1;
|
||||||
|
fadt->x_pm1b_cnt_blk.bit_width = 0;
|
||||||
|
fadt->x_pm1b_cnt_blk.bit_offset = 0;
|
||||||
|
fadt->x_pm1b_cnt_blk.access_size = 0;
|
||||||
|
fadt->x_pm1b_cnt_blk.addrl = 0x0;
|
||||||
|
fadt->x_pm1b_cnt_blk.addrh = 0x0;
|
||||||
|
|
||||||
|
fadt->x_pm2_cnt_blk.space_id = 1;
|
||||||
|
fadt->x_pm2_cnt_blk.bit_width = 8;
|
||||||
|
fadt->x_pm2_cnt_blk.bit_offset = 0;
|
||||||
|
fadt->x_pm2_cnt_blk.access_size = ACPI_ACCESS_SIZE_BYTE_ACCESS;
|
||||||
|
fadt->x_pm2_cnt_blk.addrl = pmbase + 0x50;
|
||||||
|
fadt->x_pm2_cnt_blk.addrh = 0x0;
|
||||||
|
|
||||||
|
fadt->x_pm_tmr_blk.space_id = 1;
|
||||||
|
fadt->x_pm_tmr_blk.bit_width = 32;
|
||||||
|
fadt->x_pm_tmr_blk.bit_offset = 0;
|
||||||
|
fadt->x_pm_tmr_blk.access_size = ACPI_ACCESS_SIZE_DWORD_ACCESS;
|
||||||
|
fadt->x_pm_tmr_blk.addrl = pmbase + 0x8;
|
||||||
|
fadt->x_pm_tmr_blk.addrh = 0x0;
|
||||||
|
|
||||||
|
fadt->x_gpe0_blk.space_id = 1;
|
||||||
|
fadt->x_gpe0_blk.bit_width = 128;
|
||||||
|
fadt->x_gpe0_blk.bit_offset = 0;
|
||||||
|
fadt->x_gpe0_blk.access_size = ACPI_ACCESS_SIZE_DWORD_ACCESS;
|
||||||
|
fadt->x_gpe0_blk.addrl = pmbase + 0x20;
|
||||||
|
fadt->x_gpe0_blk.addrh = 0x0;
|
||||||
|
|
||||||
|
fadt->x_gpe1_blk.space_id = 1;
|
||||||
|
fadt->x_gpe1_blk.bit_width = 0;
|
||||||
|
fadt->x_gpe1_blk.bit_offset = 0;
|
||||||
|
fadt->x_gpe1_blk.access_size = 0;
|
||||||
|
fadt->x_gpe1_blk.addrl = 0x0;
|
||||||
|
fadt->x_gpe1_blk.addrh = 0x0;
|
||||||
|
}
|
||||||
|
|
||||||
static struct pci_operations pci_ops = {
|
static struct pci_operations pci_ops = {
|
||||||
.set_subsystem = set_subsystem,
|
.set_subsystem = set_subsystem,
|
||||||
};
|
};
|
||||||
|
|
|
||||||
Loading…
Reference in New Issue