mb/google/mancomb: Temporary fix to set eSPI mux
BUG=b:182211161 TEST=builds Signed-off-by: Eric Lai <ericr_lai@compal.corp-partner.google.com> Change-Id: Ief59bdea392ab3f141ccf7444c608aef99701d2e Reviewed-on: https://review.coreboot.org/c/coreboot/+/52176 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Martin Roth <martinroth@google.com>
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/* SPDX-License-Identifier: GPL-2.0-only */
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#include <amdblocks/acpimmio.h>
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#include <bootblock_common.h>
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#include <baseboard/variants.h>
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#include <console/console.h>
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#include <device/pci_ops.h>
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#include <soc/pci_devs.h>
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void bootblock_mainboard_early_init(void)
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{
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size_t num_gpios;
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uint32_t dword;
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const struct soc_amd_gpio *gpios;
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if (!CONFIG(VBOOT_STARTS_BEFORE_BOOTBLOCK)) {
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gpios = variant_early_gpio_table(&num_gpios);
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program_gpios(gpios, num_gpios);
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}
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printk(BIOS_DEBUG, "Bootblock configure eSPI\n");
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dword = pci_read_config32(SOC_LPC_DEV, 0x78);
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dword &= 0xFFFFF9F3;
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dword |= 0x200;
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pci_write_config32(SOC_LPC_DEV, 0x78, dword);
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pci_write_config32(SOC_LPC_DEV, 0x44, 0);
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pci_write_config32(SOC_LPC_DEV, 0x48, 0);
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dword = pm_read32(0x90);
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dword |= 1 << 16;
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pm_write32(0x90, dword);
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dword = pm_read32(0x74);
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dword |= 3 << 10;
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pm_write32(0x74, dword);
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}
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