From 67dbbeaa300a3b1c361a11de6518ad2acada17c0 Mon Sep 17 00:00:00 2001 From: Subrata Banik Date: Thu, 1 Dec 2022 09:23:07 +0530 Subject: [PATCH] soc/intel/alderlake: Drop duplicate macro `PCH_PWRM_BASE_SIZE` This patch ensures dropping of the duplicate macro introduced with 'commit 9e4488ab06fd9c4 ("soc/intel/{adl,cmn}: Add/Remove LTR disqualification for UFS")' `PCH_PWRM_BASE_SIZE` macro represents the size of the PMC MMIO range which can be used as is even in ufs.asl file. BUG=b:252975357 TEST=Build and boot nirwen and see no issues in PLT runs. Signed-off-by: Subrata Banik Change-Id: Ic967c609e1330eca1b9e1143e7efd78db011f317 Reviewed-on: https://review.coreboot.org/c/coreboot/+/70180 Reviewed-by: Reka Norman Tested-by: build bot (Jenkins) Reviewed-by: Nick Vaccaro --- src/soc/intel/alderlake/include/soc/ufs.h | 1 - 1 file changed, 1 deletion(-) diff --git a/src/soc/intel/alderlake/include/soc/ufs.h b/src/soc/intel/alderlake/include/soc/ufs.h index e3a98f2e34..a7efc8a725 100644 --- a/src/soc/intel/alderlake/include/soc/ufs.h +++ b/src/soc/intel/alderlake/include/soc/ufs.h @@ -24,5 +24,4 @@ #define R_SCS_PCR_1078 0x1078 #define R_PMC_PWRM_LTR_IGN 0x1b0c -#define PCH_PWRM_BASE_SIZE 0x1e30 #endif