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soc/intel/adl: Cast size in systemagent.c to fix overflow 

This CL fixes my previous CL (commit ca741055e)
which introduced a couple of issues found by Coverity (see below).
The Coverity explanation is: "Potentially overflowing expression "size_field * 1048576U" with type "unsigned int" (32 bits, unsigned) is evaluated using 32-bit arithmetic, and then used in a context that expects an expression of type "uint64_t" (64 bits, unsigned)."

*** CID 1490122:  Integer handling issues  (OVERFLOW_BEFORE_WIDEN)
/src/soc/intel/alderlake/systemagent.c: 305 in get_dpr_size()

*** CID 1490121:  Integer handling issues  (OVERFLOW_BEFORE_WIDEN)
/src/soc/intel/alderlake/systemagent.c: 254 in get_dsm_size()


BUG=b:149830546
BRANCH=firmware-brya-14505.B
TEST='emerge-brya coreboot chromeos-bootimage' builds correctly.
Tested on an Anahera device which successfully boots to ChromeOS
with kernel version 5.10.109-15688-g857e654d1705.

Change-Id: Ib2d66ad24a5ad67b51036ad376a6938f698134c3
Signed-off-by: Eran Mitrani <mitrani@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/65212
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Eran Mitrani 2022-06-17 16:19:38 -07:00 committed by Felix Held
parent f23cf44c47
commit 68033c2483
1 changed files with 2 additions and 2 deletions
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4
src/soc/intel/alderlake/systemagent.c
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@ -267,7 +267,7 @@ uint64_t get_dsm_size(struct device *dev)
if (size_field <= 0x10) { // 0x0 - 0x10 if (size_field <= 0x10) { // 0x0 - 0x10
size = size_field * 32 * MiB; size = size_field * 32 * MiB;
} else if ((size_field >= 0xF0) && (size_field >= 0xFE)) { } else if ((size_field >= 0xF0) && (size_field >= 0xFE)) {
size = (size_field - 0xEF) * 4 * MiB; size = ((uint64_t)size_field - 0xEF) * 4 * MiB;
} else { } else {
switch (size_field) { switch (size_field) {
case 0x20: case 0x20:
@ -318,6 +318,6 @@ uint64_t get_dpr_size(struct device *dev)
uint64_t size; uint64_t size;
uint32_t dpr_reg = pci_read_config32(dev, DPR_REG); uint32_t dpr_reg = pci_read_config32(dev, DPR_REG);
uint32_t size_field = (dpr_reg & MASK_DPR_LENGTH) >> MASK_DPR_LENGTH_LSB; uint32_t size_field = (dpr_reg & MASK_DPR_LENGTH) >> MASK_DPR_LENGTH_LSB;
size = size_field * MiB; size = (uint64_t)size_field * MiB;
return size; return size;
} }