GNUBoot
/
coreboot-kgpe-d16
2
0
Fork 0
Code Issues Pull Requests Packages Projects Releases Wiki Activity

mainboard/supermicro: x11ssm-f: disable SUART3/4 

SUART3/4 are unused on this board (verified by checking registers on
vendor BMC firmware). Further they break the console for an unknown
reason. Thus disable them.

Change-Id: I30bb8184d03ee1037d9ec33eb1d93ee540563fc5
Signed-off-by: Michael Niewöhner <foss@mniewoehner.de>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/38818
Reviewed-by: Patrick Rudolph <siro@das-labor.org>
Reviewed-by: Nico Huber <nico.h@gmx.de>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Michael Niewöhner 2020-02-10 19:21:22 +01:00 committed by Nico Huber
parent b1f1ee38d5
commit 6824173704
1 changed files with 2 additions and 10 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

12
src/mainboard/supermicro/x11-lga1151-series/variants/x11ssm-f/overridetree.cb
View File

@ -10,8 +10,6 @@ chip soc/intel/skylake
register "gen1_dec" = "0x007c0a01" # Super IO SWC
register "gen2_dec" = "0x000c0ca1" # IPMI KCS
register "gen3_dec" = "0x000c03e1" # UART3
register "gen4_dec" = "0x000c02e1" # UART4
# PCIe configuration
register "PcieRpEnable[0]" = "1" # Enable PCH PCIe Port 1 / PCH SLOT4
@ -103,14 +101,8 @@ chip soc/intel/skylake
end
device pnp 2e.5 off end # KBC
device pnp 2e.7 on end # GPIO
device pnp 2e.b on # SUART3
io 0x60 = 0x3e8
irq 0x70 = 4
end
device pnp 2e.c on # SUART4
io 0x60 = 0x2e8
irq 0x70 = 3
end
device pnp 2e.b off end # SUART3
device pnp 2e.c off end # SUART4
device pnp 2e.d on end # iLPC2AHB
device pnp 2e.e on # Mailbox
io 0x60 = 0xa40