soc/intel/alderlake: Enable support for extended BIOS window
Port commit ba75c4c
(soc/intel/tigerlake: Enable support for
extended BIOS window) for Alderlake
Change-Id: Iaa8464d45884de433cca4f6a250cdd8d4c8f3661
Signed-off-by: Subrata Banik <subrata.banik@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/48755
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
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@ -15,6 +15,7 @@ config CPU_SPECIFIC_OPTIONS
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select CPU_INTEL_FIRMWARE_INTERFACE_TABLE
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select CPU_SUPPORTS_PM_TIMER_EMULATION
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select FSP_COMPRESS_FSP_S_LZ4
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select FAST_SPI_SUPPORTS_EXT_BIOS_WINDOW
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select FSP_M_XIP
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select FSP_STATUS_GLOBAL_RESET_REQUIRED_3
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select GENERIC_GPIO_LIB
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@ -96,6 +97,12 @@ config CHIPSET_DEVICETREE
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string
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default "soc/intel/alderlake/chipset.cb"
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config EXT_BIOS_WIN_BASE
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default 0xf8000000
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config EXT_BIOS_WIN_SIZE
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default 0x2000000
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config IFD_CHIPSET
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string
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default "adl"
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