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mmio pci config: Remove register constraints 

The currently encoded register constraints fails compilation
for SMM code or any code that compiles with -fPIC. The reason
is that the ebx register is used for GOT base register.

I don't believe the comment eluding to register constraints for AMD
processors still applies. Therefore remove mmio_conf.h, and use the
mmio methods in io.h.

Change-Id: I391e5c2088ebc760b3a6ed6c37b65bbecab40a5c
Signed-off-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: http://review.coreboot.org/1801
Tested-by: build bot (Jenkins)
Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
This commit is contained in:
Aaron Durbin 2012-10-31 22:39:06 -05:00 committed by Stefan Reinauer
parent 632175802e
commit 6866c08129
3 changed files with 12 additions and 87 deletions
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67
src/arch/x86/include/arch/mmio_conf.h
View File

@ -1,67 +0,0 @@
#ifndef ARCH_MMIO_H
#define ARCH_MMIO_H 1
// Extended read, constrain to use registers as mandated by AMD MMCONFIG mechanism.
static inline __attribute__((always_inline)) uint8_t read8x(uint32_t addr)
{
uint8_t value;
__asm__ volatile (
"movb (%1), %%al\n\t"
:"=a"(value): "b" (addr)
);
return value;
}
static inline __attribute__((always_inline)) uint16_t read16x(uint32_t addr)
{
uint16_t value;
__asm__ volatile (
"movw (%1), %%ax\n\t"
:"=a"(value): "b" (addr)
);
return value;
}
static inline __attribute__((always_inline)) uint32_t read32x(uint32_t addr)
{
uint32_t value;
__asm__ volatile (
"movl (%1), %%eax\n\t"
:"=a"(value): "b" (addr)
);
return value;
}
static inline __attribute__((always_inline)) void write8x(uint32_t addr, uint8_t value)
{
__asm__ volatile (
"movb %%al, (%0)\n\t"
:: "b" (addr), "a" (value)
);
}
static inline __attribute__((always_inline)) void write16x(uint32_t addr, uint16_t value)
{
__asm__ volatile (
"movw %%ax, (%0)\n\t"
:: "b" (addr), "a" (value)
);
}
static inline __attribute__((always_inline)) void write32x(uint32_t addr, uint32_t value)
{
__asm__ volatile (
"movl %%eax, (%0)\n\t"
:: "b" (addr), "a" (value)
);
}
#endif /* ARCH_MMIO_H */

18
src/arch/x86/include/arch/romcc_io.h
View File

@ -7,12 +7,6 @@
// also be pulled in here for all romcc/romstage code.
// #include <arch/io.h>
#if CONFIG_MMCONF_SUPPORT
#include <arch/mmio_conf.h>
#endif
static inline int log2(int value)
{
unsigned int r = 0;
@ -79,7 +73,7 @@ static inline __attribute__((always_inline)) uint8_t pci_mmio_read_config8(devic
{
unsigned addr;
addr = CONFIG_MMCONF_BASE_ADDRESS | dev | where;
return read8x(addr);
return read8(addr);
}
#endif
static inline __attribute__((always_inline)) uint8_t pci_read_config8(device_t dev, unsigned where)
@ -108,7 +102,7 @@ static inline __attribute__((always_inline)) uint16_t pci_mmio_read_config16(dev
{
unsigned addr;
addr = CONFIG_MMCONF_BASE_ADDRESS | dev | (where & ~1);
return read16x(addr);
return read16(addr);
}
#endif
@ -139,7 +133,7 @@ static inline __attribute__((always_inline)) uint32_t pci_mmio_read_config32(dev
{
unsigned addr;
addr = CONFIG_MMCONF_BASE_ADDRESS | dev | (where & ~3);
return read32x(addr);
return read32(addr);
}
#endif
@ -169,7 +163,7 @@ static inline __attribute__((always_inline)) void pci_mmio_write_config8(device_
{
unsigned addr;
addr = CONFIG_MMCONF_BASE_ADDRESS | dev | where;
write8x(addr, value);
write8(addr, value);
}
#endif
@ -200,7 +194,7 @@ static inline __attribute__((always_inline)) void pci_mmio_write_config16(device
{
unsigned addr;
addr = CONFIG_MMCONF_BASE_ADDRESS | dev | (where & ~1);
write16x(addr, value);
write16(addr, value);
}
#endif
@ -231,7 +225,7 @@ static inline __attribute__((always_inline)) void pci_mmio_write_config32(device
{
unsigned addr;
addr = CONFIG_MMCONF_BASE_ADDRESS | dev | (where & ~3);
write32x(addr, value);
write32(addr, value);
}
#endif

14
src/arch/x86/lib/pci_ops_mmconf.c
View File

@ -15,42 +15,40 @@
(((DEVFN) & 0xFF) << 12) |\
((WHERE) & 0xFFF))
#include <arch/mmio_conf.h>
static uint8_t pci_mmconf_read_config8(struct bus *pbus, int bus, int devfn,
int where)
{
return (read8x(PCI_MMIO_ADDR(bus, devfn, where)));
return (read8(PCI_MMIO_ADDR(bus, devfn, where)));
}
static uint16_t pci_mmconf_read_config16(struct bus *pbus, int bus, int devfn,
int where)
{
return (read16x(PCI_MMIO_ADDR(bus, devfn, where) & ~1));
return (read16(PCI_MMIO_ADDR(bus, devfn, where) & ~1));
}
static uint32_t pci_mmconf_read_config32(struct bus *pbus, int bus, int devfn,
int where)
{
return (read32x(PCI_MMIO_ADDR(bus, devfn, where) & ~3));
return (read32(PCI_MMIO_ADDR(bus, devfn, where) & ~3));
}
static void pci_mmconf_write_config8(struct bus *pbus, int bus, int devfn,
int where, uint8_t value)
{
write8x(PCI_MMIO_ADDR(bus, devfn, where), value);
write8(PCI_MMIO_ADDR(bus, devfn, where), value);
}
static void pci_mmconf_write_config16(struct bus *pbus, int bus, int devfn,
int where, uint16_t value)
{
write16x(PCI_MMIO_ADDR(bus, devfn, where) & ~1, value);
write16(PCI_MMIO_ADDR(bus, devfn, where) & ~1, value);
}
static void pci_mmconf_write_config32(struct bus *pbus, int bus, int devfn,
int where, uint32_t value)
{
write32x(PCI_MMIO_ADDR(bus, devfn, where) & ~3, value);
write32(PCI_MMIO_ADDR(bus, devfn, where) & ~3, value);
}
const struct pci_bus_operations pci_ops_mmconf = {