soc/amd/picasso: only link soc_util in ramstage

No code that was or will be upstreamed uses functionality from soc_util
in romstage, so only compile and link it for ramstage.
This also allows to fix the SoC type detection in a follow-up patch
using information that FPS-M will be providing in a HOB.

BUG=b:153779573

Change-Id: If96e53608eadd562f6de5a0c370b89e84e43d049
Signed-off-by: Felix Held <felix-coreboot@felixheld.de>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/41430
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Raul Rangel <rrangel@chromium.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
This commit is contained in:
Felix Held 2020-05-15 18:12:35 +02:00 committed by Patrick Georgi
parent 979e80dc47
commit 68975b15cf
1 changed files with 0 additions and 1 deletions

View File

@ -29,7 +29,6 @@ romstage-$(CONFIG_PICASSO_UART) += uart.c
romstage-y += tsc_freq.c romstage-y += tsc_freq.c
romstage-y += southbridge.c romstage-y += southbridge.c
romstage-$(CONFIG_HAVE_SMI_HANDLER) += smi_util.c romstage-$(CONFIG_HAVE_SMI_HANDLER) += smi_util.c
romstage-y += soc_util.c
romstage-y += psp.c romstage-y += psp.c
romstage-y += mtrr.c romstage-y += mtrr.c
romstage-y += config.c romstage-y += config.c