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macbookair4_2: fix FIXME's left by autoport. 

Change-Id: Iff1864982f2f3337c33e56976a0d4eb36f171e66
Signed-off-by: Vladimir Serbinenko <phcoder@gmail.com>
Reviewed-on: http://review.coreboot.org/11854
Tested-by: build bot (Jenkins)
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
This commit is contained in:
Vladimir Serbinenko 2015-10-10 23:16:31 +02:00
parent d57fb2d97b
commit 68c70994e5
5 changed files with 8 additions and 34 deletions
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2
src/mainboard/apple/macbookair4_2/Kconfig
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@ -52,7 +52,7 @@ config MMCONF_BASE_ADDRESS
hex
default 0xf0000000
config DRAM_RESET_GATE_GPIO # FIXME: check this
config DRAM_RESET_GATE_GPIO
int
default 60

4
src/mainboard/apple/macbookair4_2/board_info.txt
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@ -1,4 +1,6 @@
Category: laptop
ROM protocol: SPI
Flashrom support: n
FIXME: put ROM package, ROM socketed, Release year
ROM package: WSON-8
ROM socketed: n
Release year: 2011

8
src/mainboard/apple/macbookair4_2/devicetree.cb
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@ -1,7 +1,7 @@
chip northbridge/intel/sandybridge # FIXME: check gfx.ndid and gfx.did
register "gfx.did" = "{ 0x80000100, 0x80000240, 0x80000410, 0x80000410, 0x00000005 }"
chip northbridge/intel/sandybridge
register "gfx.did" = "{ 0x80000410, 0x80000320, 0x80000410, 0x80000410, 0x00000005 }"
register "gfx.link_frequency_270_mhz" = "0"
register "gfx.ndid" = "3"
register "gfx.ndid" = "2"
register "gfx.use_spread_spectrum_clock" = "1"
register "gpu_cpu_backlight" = "0x00001312"
register "gpu_dp_b_hotplug" = "4"
@ -19,7 +19,7 @@ chip northbridge/intel/sandybridge # FIXME: check gfx.ndid and gfx.did
device lapic 0x0 on
end
end
chip cpu/intel/model_206ax # FIXME: check all registers
chip cpu/intel/model_206ax
register "c1_acpower" = "1"
register "c1_battery" = "1"
register "c2_acpower" = "3"

1
src/mainboard/apple/macbookair4_2/gnvs.c
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@ -1,6 +1,5 @@
#include <southbridge/intel/bd82x6x/nvs.h>
/* FIXME: check this function. */
void acpi_create_gnvs(global_nvs_t *gnvs)
{
/* Disable USB ports in S3 by default */

27
src/mainboard/apple/macbookair4_2/mainboard.c
View File

@ -9,33 +9,6 @@ static void mainboard_init(device_t dev)
RCBA32(0x38c8) = 0x00002005;
RCBA32(0x38c4) = 0x00800000;
RCBA32(0x38c0) = 0x00000007;
/* FIXME: trim this down or remove if necessary */
{
int i;
const u8 dmp[256] = {
/* 00 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
/* 10 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
/* 20 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
/* 30 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
/* 40 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
/* 50 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
/* 60 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
/* 70 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
/* 80 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
/* 90 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
/* a0 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
/* b0 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
/* c0 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
/* d0 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
/* e0 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
/* f0 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
};
printk(BIOS_DEBUG, "Replaying EC dump ...");
for (i = 0; i < 256; i++)
ec_write (i, dmp[i]);
printk(BIOS_DEBUG, "done\n");
}
}
static void mainboard_enable(device_t dev)