mb/google/hatch/var/jinlon: Enable gfx/generic driver

Enable the GFX device for Jinlon.

Change-Id: I6ba90bf464e315ec364b6f35e7670924a2aba25a
Signed-off-by: Rajat Jain <rajatja@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/39155
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Mathew King <mathewk@chromium.org>
This commit is contained in:
Rajat Jain 2020-02-26 21:10:54 -08:00 committed by Patrick Georgi
parent 7ef06b0234
commit 68cd0d0b2c
2 changed files with 12 additions and 0 deletions

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@ -19,6 +19,7 @@ config BOARD_GOOGLE_JINLON
bool "-> Jinlon" bool "-> Jinlon"
select BOARD_GOOGLE_BASEBOARD_HATCH select BOARD_GOOGLE_BASEBOARD_HATCH
select BOARD_ROMSIZE_KB_16384 select BOARD_ROMSIZE_KB_16384
select DRIVERS_GFX_GENERIC
config BOARD_GOOGLE_KOHAKU config BOARD_GOOGLE_KOHAKU
bool "-> Kohaku" bool "-> Kohaku"

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@ -65,6 +65,17 @@ chip soc/intel/cannonlake
register "ScsEmmcHs400Enabled" = "1" register "ScsEmmcHs400Enabled" = "1"
device domain 0 on device domain 0 on
device pci 02.0 on
chip drivers/gfx/generic
register "device_count" = "1"
register "device[0].name" = ""LCD""
# Internal panel on the first port of the graphics chip
register "device[0].addr" = "0x80010400"
register "device[0].privacy.enabled" = "1"
register "device[0].privacy.gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_E0)"
device generic 0 on end
end
end # Integrated Graphics Device
device pci 15.0 on device pci 15.0 on
chip drivers/i2c/generic chip drivers/i2c/generic
register "hid" = ""ELAN0000"" register "hid" = ""ELAN0000""