From 68e4cbd9d6c4b7bf88b0f6fc207e75d1528766ad Mon Sep 17 00:00:00 2001 From: Patrick Georgi Date: Mon, 17 Nov 2014 09:27:08 +0100 Subject: [PATCH] tegra124: actually parse is_lvds Precedence rules make the compiler optimize const | var ? val1 : val2; into val1. In our case this means not writing 2 << NV_SOR_CSTM_ROTCLK_SHIFT to the register and not caring about the content of is_lvds. Change-Id: I0b02c74f9445f51bfab9eeae2e8eb9480d104708 Found-by: Coverity Scan Signed-off-by: Patrick Georgi Reviewed-on: http://review.coreboot.org/7501 Reviewed-by: Edward O'Callaghan Reviewed-by: Paul Menzel Tested-by: build bot (Jenkins) --- src/soc/nvidia/tegra124/sor.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/src/soc/nvidia/tegra124/sor.c b/src/soc/nvidia/tegra124/sor.c index 3ff39ed0f2..3a2764801a 100644 --- a/src/soc/nvidia/tegra124/sor.c +++ b/src/soc/nvidia/tegra124/sor.c @@ -556,8 +556,8 @@ static void tegra_dc_sor_config_panel(struct tegra_dc_sor_data *sor, NV_SOR_CSTM_ROTCLK_DEFAULT_MASK | NV_SOR_CSTM_LVDS_EN_ENABLE, 2 << NV_SOR_CSTM_ROTCLK_SHIFT | - is_lvds ? NV_SOR_CSTM_LVDS_EN_ENABLE : - NV_SOR_CSTM_LVDS_EN_DISABLE); + (is_lvds ? NV_SOR_CSTM_LVDS_EN_ENABLE : + NV_SOR_CSTM_LVDS_EN_DISABLE)); } static void tegra_dc_sor_enable_dc(struct tegra_dc_sor_data *sor)